A headband for classifying human postures.

a real-time method using only accelerometer data is developed for classifying basic human static postures, namely sitting, standing, and lying, as well as dynamic transitions between them. The algorithm uses discrete wavelet transform (DWT) in combination with a fuzzy logic inference system (FIS). Data from a single three-axis accelerometer integrated into a wearable headband is transmitted wirelessly, collected and analyzed in real time on a laptop computer, to extract two sets of features for posture classification. The received acceleration signals are decomposed using the DWT to extract the dynamic features; changes in the smoothness of the signal that reflect a transition between postures are detected at finer DWT scales. FIS then uses the previous posture transition and DWT-extracted features to determine the static postures.

A high-voltage, high-current CMOS pulse generator ASIC for deep brain stimulation.

A high-voltage, high-current pulse generator ASIC based on 0.35-εm high-voltage CMOS technology is presented. The chip has eight independently-controlled biphasic output channels that can generate either current- or voltage-controlled pulses. The output driver is capable of delivering current up to 1.26 mA or 5.04 mA and voltage up to 2.36 V or 9.45 V; all with 6-bit resolution. The stimulation frequency can be adjusted between 3 Hz to 5 kHz, while pulse width can vary from 20 µs to 640 εs in 20 εs steps for 100-kHz clock frequency. The timing parameters can be adjusted further by varying the clock frequency. These parameters, including pulse phase, can be programmed independently in each channel to allow different waveform generation. The foregoing provides an on-chip solution for an arbitrary function generator that can be monolithically fabricated with the rest of the circuitry. Based on its configuration this chip is an ideal solution for deep brain stimulation (DBS) electrode for targeted stimulation through current steering.

Electromechanical computing at 500 degrees C with silicon carbide.

Logic circuits capable of operating at high temperatures can alleviate expensive heat-sinking and thermal-management requirements of modern electronics and are enabling for advanced propulsion systems. Replacing existing complementary metal-oxide semiconductor field-effect transistors with silicon carbide (SiC) nanoelectromechanical system (NEMS) switches is a promising approach for low-power, high-performance logic operation at temperatures higher than 300 degrees C, beyond the capability of conventional silicon technology. These switches are capable of achieving virtually zero off-state current, microwave operating frequencies, radiation hardness, and nanoscale dimensions. Here, we report a microfabricated electromechanical inverter with SiC complementary NEMS switches capable of operating at 500 degrees C with ultralow leakage current.

3-D microfabricated electrodes for targeted deep brain stimulation.

This work presents a novel 4-sided, 16-channel deep brain stimulation electrode with a custom flexible high-density lead for connectivity with pulse generation electronics. The 3-dimensional electrode enables steering the current field circumferentially. The electrode is fabricated in pieces by micromachining and microfabrication techniques; the pieces are then assembled mechanically to form the electrode, after which the lead is connected. The electrode is modeled by finite element analysis and tested in vitro to validate the design concept, i.e., targeted stimulation. Simulation and experimental results for a targeted stimulation show close agreement. With a symmetric bipolar stimulation configuration, within a 3 mm radius, the electric potential in front of the activated side is at least 3.6 times larger than that on the corresponding two adjacent, not-activated sides, and 9 times larger than the corresponding opposite, not-activated side.

Very thin poly-SiC films for micro/nano devices.

We report characterization of nitrogen-doped, very thin, low-stress polycrystalline silicon carbide (poly-SiC) films suitable for fabricating micro/nano devices. The poly-SiC films are deposited on 100 mm-diameter (100) silicon wafers in a large-scale, hot-wall, horizontal LPCVD furnace using SiH2Cl2 and C2H2 as precursors and NH, as doping gas. The deposition temperature and pressure are fixed at 900 degrees C and 4 Torr, respectively. The deposition rate increases substantially in the first 50 minutes, transitioning to a limiting value thereafter. The deposited films exhibit (111)-orientated polycrystalline 3C-SiC texture. HR-TEM indicates a 1 nm to 4 nm amorphous SiC layer at the SiC/silicon interface. The residual stress and the resistivity of the films are found to be thickness dependent in the range of 100 nm to 1 microm. Films with thickness less than 100 nm suffer from voids or pinholes. Films thicker than 100 nm are shown to be suitable for fabricating micro/nano devices.