Thermal Compact Modeling and Resistive Switching Analysis in Titanium Oxide-Based Memristors.

Resistive switching devices based on the Au/Ti/TiO2/Au stack were developed. In addition to standard electrical characterization by means of I-V curves, scanning thermal microscopy was employed to localize the hot spots on the top device surface (linked to conductive nanofilaments, CNFs) and perform in-operando tracking of temperature in such spots. In this way, electrical and thermal responses can be simultaneously recorded and related to each other. In a complementary way, a model for device simulation (based on COMSOL Multiphysics) was implemented in order to link the measured temperature to simulated device temperature maps. The data obtained were employed to calculate the thermal resistance to be used in compact models, such as the Stanford model, for circuit simulation. The thermal resistance extraction technique presented in this work is based on electrical and thermal measurements instead of being indirectly supported by a single fitting of the electrical response (using just I-V curves), as usual. Besides, the set and reset voltages were calculated from the complete I-V curve resistive switching series through different automatic numerical methods to assess the device variability. The series resistance was also obtained from experimental measurements, whose value is also incorporated into a compact model enhanced version.

Nanoscale temperature sensing of electronic devices with calibrated scanning thermal microscopy.

Heat dissipation threatens the performance and lifetime of many electronic devices. As the size of devices shrinks to the nanoscale, we require spatially and thermally resolved thermometry to observe their fine thermal features. Scanning thermal microscopy (SThM) has proven to be a versatile measurement tool for characterizing the temperature at the surface of devices with nanoscale resolution. SThM can obtain qualitative thermal maps of a device using an operating principle based on a heat exchange process between a thermo-sensitive probe and the sample surface. However, the quantification of these thermal features is one of the most challenging parts of this technique. Developing reliable calibration approaches for SThM is therefore an essential aspect to accurately determine the temperature at the surface of a sample or device. In this work, we calibrate a thermo-resistive SThM probe using heater-thermometer metal lines with different widths (50 nm to 750 nm), which mimic variable probe-sample thermal exchange processes. The sensitivity of the SThM probe when scanning the metal lines is also evaluated under different probe and line temperatures. Our results reveal that the calibration factor depends on the probe measuring conditions and on the size of the surface heating features. This approach is validated by mapping the temperature profile of a phase change electronic device. Our analysis provides new insights on how to convert the thermo-resistive SThM probe signal to the scanned device temperature more accurately.

Hybrid 2D-CMOS microchips for memristive applications.

Exploiting the excellent electronic properties of two-dimensional (2D) materials to fabricate advanced electronic circuits is a major goal for the semiconductor industry1,2. However, most studies in this field have been limited to the fabrication and characterization of isolated large (more than 1 µm2) devices on unfunctional SiO2-Si substrates. Some studies have integrated monolayer graphene on silicon microchips as a large-area (more than 500 µm2) interconnection3 and as a channel of large transistors (roughly 16.5 µm2) (refs. 4,5), but in all cases the integration density was low, no computation was demonstrated and manipulating monolayer 2D materials was challenging because native pinholes and cracks during transfer increase variability and reduce yield. Here, we present the fabrication of high-integration-density 2D-CMOS hybrid microchips for memristive applications-CMOS stands for complementary metal-oxide-semiconductor. We transfer a sheet of multilayer hexagonal boron nitride onto the back-end-of-line interconnections of silicon microchips containing CMOS transistors of the 180 nm node, and finalize the circuits by patterning the top electrodes and interconnections. The CMOS transistors provide outstanding control over the currents across the hexagonal boron nitride memristors, which allows us to achieve endurances of roughly 5 million cycles in memristors as small as 0.053 µm2. We demonstrate in-memory computation by constructing logic gates, and measure spike-timing dependent plasticity signals that are suitable for the implementation of spiking neural networks. The high performance and the relatively-high technology readiness level achieved represent a notable advance towards the integration of 2D materials in microelectronic products and memristive applications.

Ferrofluidic thermal switch in a magnetocaloric device.

Thermal switches are advanced heat-management devices that represent a new opportunity to improve the energy efficiency and power density of caloric devices. In this study we have developed a numerical model to analyze the operation and the performance of static thermal switches in caloric refrigeration. The investigation comprises a parametric analysis of a realistic ferrofluidic thermal switch in terms of the maximum temperature span, cooling power, and coefficient of performance. The highest achieved temperature span between the heat source and the heat sink was 1.12 K for a single embodiment, which could be further developed into a regenerative system to increase the temperature span. A sensitivity analysis is conducted to correlate the relationship between the input parameters and the results. We show that thermal switches can be used in caloric devices even when switching ratios are small, which greatly extends the possibilities to implement different types of thermal switches.

Thermal rectification in multilayer phase change material structures for energy storage applications.

Solid-state thermal control devices that present an asymmetric heat flow depending on thermal bias directionality, referred to as thermal diodes, have recently received increased attention for energy management. The use of materials that can change phase is a common approach to design thermal diodes, but typical sizes, moderate rectification ratios, and narrow thermal tunability limit their potential applications. In this work, we propose a multilayer thermal diode made of a combination of phase change and invariant materials. This device presents state-of-the-art thermal rectification ratios up to 136% for a temperature range between 300 K and 500 K. Importantly, this design allows to switch between distinct rectification states that can be modulated with temperature, achieving an additional degree of thermal control compared with single-rectification-state devices. We analyze the relevance of our thermal diodes for retaining heat more efficiently in thermal storage elements.

Ultrahigh thermal isolation across heterogeneously layered two-dimensional materials.

Heterogeneous integration of nanomaterials has enabled advanced electronics and photonics applications. However, similar progress has been challenging for thermal applications, in part due to shorter wavelengths of heat carriers (phonons) compared to electrons and photons. Here, we demonstrate unusually high thermal isolation across ultrathin heterostructures, achieved by layering atomically thin two-dimensional (2D) materials. We realize artificial stacks of monolayer graphene, MoS2, and WSe2 with thermal resistance greater than 100 times thicker SiO2 and effective thermal conductivity lower than air at room temperature. Using Raman thermometry, we simultaneously identify the thermal resistance between any 2D monolayers in the stack. Ultrahigh thermal isolation is achieved through the mismatch in mass density and phonon density of states between the 2D layers. These thermal metamaterials are an example in the emerging field of phononics and could find applications where ultrathin thermal insulation is desired, in thermal energy harvesting, or for routing heat in ultracompact geometries.

Localized Triggering of the Insulator-Metal Transition in VO2 Using a Single Carbon Nanotube.

Vanadium dioxide (VO2) has been widely studied for its rich physics and potential applications, undergoing a prominent insulator-metal transition (IMT) near room temperature. The transition mechanism remains highly debated, and little is known about the IMT at nanoscale dimensions. To shed light on this problem, here we use ∼1 nm-wide carbon nanotube (CNT) heaters to trigger the IMT in VO2. Single metallic CNTs switch the adjacent VO2 at less than half the voltage and power required by control devices without a CNT, with switching power as low as ∼85 µW at 300 nm device lengths. We also obtain potential and temperature maps of devices during operation using Kelvin probe microscopy and scanning thermal microscopy. Comparing these with three-dimensional electrothermal simulations, we find that the local heating of the VO2 by the CNT plays a key role in the IMT. These results demonstrate the ability to trigger IMT in VO2 using nanoscale heaters and highlight the significance of thermal engineering to improve device behavior.

Significant Phonon Drag Enables High Power Factor in the AlGaN/GaN Two-Dimensional Electron Gas.

In typical thermoelectric energy harvesters and sensors, the Seebeck effect is caused by diffusion of electrons or holes in a temperature gradient. However, the Seebeck effect can also have a phonon drag component, due to momentum exchange between charge carriers and lattice phonons, which is more difficult to quantify. Here, we present the first study of phonon drag in the AlGaN/GaN two-dimensional electron gas (2DEG). We find that phonon drag does not contribute significantly to the thermoelectric behavior of devices with ∼100 nm GaN thickness, which suppresses the phonon mean free path. However, when the thickness is increased to ∼1.2 µm, up to 32% (88%) of the Seebeck coefficient at 300 K (50 K) can be attributed to the drag component. In turn, the phonon drag enables state-of-the-art thermoelectric power factor in the thicker GaN film, up to ∼40 mW m-1 K-2 at 50 K. By measuring the thermal conductivity of these AlGaN/GaN films, we show that the magnitude of the phonon drag can increase even when the thermal conductivity decreases. Decoupling of thermal conductivity and Seebeck coefficient could enable important advancements in thermoelectric power conversion with devices based on 2DEGs.

Spatially Resolved Thermometry of Resistive Memory Devices.

The operation of resistive and phase-change memory (RRAM and PCM) is controlled by highly localized self-heating effects, yet detailed studies of their temperature are rare due to challenges of nanoscale thermometry. Here we show that the combination of Raman thermometry and scanning thermal microscopy (SThM) can enable such measurements with high spatial resolution. We report temperature-dependent Raman spectra of HfO2, TiO2 and Ge2Sb2Te5 (GST) films, and demonstrate direct measurements of temperature profiles in lateral PCM devices. Our measurements reveal that electrical and thermal interfaces dominate the operation of such devices, uncovering a thermal boundary resistance of 28 ± 8 m2K/GW at GST-SiO2 interfaces and an effective thermopower 350 ± 50 µV/K at GST-Pt interfaces. We also discuss possible pathways to apply Raman thermometry and SThM techniques to nanoscale and vertical resistive memory devices.

Low Variability in Synthetic Monolayer MoS2 Devices.

Despite much interest in applications of two-dimensional (2D) fabrics such as MoS2, to date most studies have focused on single or few devices. Here we examine the variability of hundreds of transistors from monolayer MoS2 synthesized by chemical vapor deposition. Ultraclean fabrication yields low surface roughness of ∼3 Šand surprisingly low variability of key device parameters, considering the atomically thin nature of the material. Threshold voltage variation and very low hysteresis suggest variations in charge density and traps as low as ∼1011 cm-2. Three extraction methods (field-effect, Y-function, and effective mobility) independently reveal mobility from 30 to 45 cm2/V/s (10th to 90th percentile; highest value ∼48 cm2/V/s) across areas >1 cm2. Electrical properties are remarkably immune to the presence of bilayer regions, which cause only small conduction band offsets (∼55 meV) measured by scanning Kelvin probe microscopy, an order of magnitude lower than energy variations in Si films of comparable thickness. Data are also used as inputs to Monte Carlo circuit simulations to understand the effects of material variability on circuit variation. These advances address key missing steps required to scale 2D semiconductors into functional systems.

Thermal conductivity of Bi2Te3 nanowires: how size affects phonon scattering.

This work provides an in-depth study of how the thermal conductivity of stoichiometric [110] Bi2Te3 nanowires becomes affected when reducing its diameter from an experimental and theoretical point of view. The thermal conductivity was observed to decrease more than 70% (from 1.78 ± 0.46 W K-1 m-1 to 0.52 ± 0.35 W K-1 m-1) when the diameter of the nanowire was reduced one order of magnitude (from 300 nm to 25 nm). The Kinetic-Collective model was used to understand such a reduction, which can be explained by the impact that surface scattering has in acoustic phonons. The smaller the diameter of the nanowires is, the larger the alteration in the mean free path of the low-frequency phonons is. The model agrees well with the experimental data, and the reduction in the thermal conductivity of the nanowires can be explained in terms of an increment of phonon scattering.

Energy Dissipation in Monolayer MoS2 Electronics.

The advancement of nanoscale electronics has been limited by energy dissipation challenges for over a decade. Such limitations could be particularly severe for two-dimensional (2D) semiconductors integrated with flexible substrates or multilayered processors, both being critical thermal bottlenecks. To shed light into fundamental aspects of this problem, here we report the first direct measurement of spatially resolved temperature in functioning 2D monolayer MoS2 transistors. Using Raman thermometry, we simultaneously obtain temperature maps of the device channel and its substrate. This differential measurement reveals the thermal boundary conductance of the MoS2 interface with SiO2 (14 ± 4 MW m-2 K-1) is an order magnitude larger than previously thought, yet near the low end of known solid-solid interfaces. Our study also reveals unexpected insight into nonuniformities of the MoS2 transistors (small bilayer regions) which do not cause significant self-heating, suggesting that such semiconductors are less sensitive to inhomogeneity than expected. These results provide key insights into energy dissipation of 2D semiconductors and pave the way for the future design of energy-efficient 2D electronics.

Ultra-low thermal conductivities in large-area Si-Ge nanomeshes for thermoelectric applications.

In this work, we measure the thermal and thermoelectric properties of large-area Si0.8Ge0.2 nano-meshed films fabricated by DC sputtering of Si0.8Ge0.2 on highly ordered porous alumina matrices. The Si0.8Ge0.2 film replicated the porous alumina structure resulting in nano-meshed films. Very good control of the nanomesh geometrical features (pore diameter, pitch, neck) was achieved through the alumina template, with pore diameters ranging from 294 ± 5nm down to 31 ± 4 nm. The method we developed is able to provide large areas of nano-meshes in a simple and reproducible way, being easily scalable for industrial applications. Most importantly, the thermal conductivity of the films was reduced as the diameter of the porous became smaller to values that varied from κ = 1.54 ± 0.27 W K(-1)m(-1), down to the ultra-low κ = 0.55 ± 0.10 W K(-1)m(-1) value. The latter is well below the amorphous limit, while the Seebeck coefficient and electrical conductivity of the material were retained. These properties, together with our large area fabrication approach, can provide an important route towards achieving high conversion efficiency, large area, and high scalable thermoelectric materials.

Spatial potential ripples of azimuthal surface modes in topological insulator Bi2Te3 nanowires.

Topological insulators (TI) nanowires (NW) are an emerging class of structures, promising both novel quantum effects and potential applications in low-power electronics, thermoelectrics and spintronics. However, investigating the electronic states of TI NWs is complicated, due to their small lateral size, especially at room temperature. Here, we perform scanning probe based nanoscale imaging to resolve the local surface potential landscapes of Bi2Te3 nanowires (NWs) at 300 K. We found equipotential rings around the NWs perimeter that we attribute to azimuthal 1D modes. Along the NW axis, these modes are altered, forming potential ripples in the local density of states, due to intrinsic disturbances. Potential mapping of electrically biased NWs enabled us to accurately determine their conductivity which was found to increase with the decrease of NW diameter, consistent with surface dominated transport. Our results demonstrate that TI NWs can pave the way to both exotic quantum states and novel electronic devices.

Anisotropic Effects on the Thermoelectric Properties of Highly Oriented Electrodeposited Bi2Te3 Films.

Highly oriented [1 1 0] Bi2Te3 films were obtained by pulsed electrodeposition. The structure, composition, and morphology of these films were characterized. The thermoelectric figure of merit (zT), both parallel and perpendicular to the substrate surface, were determined by measuring the Seebeck coefficient, electrical conductivity, and thermal conductivity in each direction. At 300 K, the in-plane and out-of-plane figure of merits of these Bi2Te3 films were (5.6 ± 1.2)·10(-2) and (10.4 ± 2.6)·10(-2), respectively.

Thermal conductivity measurements of high and low thermal conductivity films using a scanning hot probe method in the 3ω mode and novel calibration strategies.

This work discusses measurement of thermal conductivity (k) of films using a scanning hot probe method in the 3ω mode and investigates the calibration of thermal contact parameters, specifically the thermal contact resistance (R(th)C) and thermal exchange radius (b) using reference samples with different thermal conductivities. R(th)C and b were found to have constant values (with b = 2.8 ± 0.3 µm and R(th)C = 44,927 ± 7820 K W(-1)) for samples with thermal conductivity values ranging from 0.36 W K(-1) m(-1) to 1.1 W K(-1) m(-1). An independent strategy for the calibration of contact parameters was developed and validated for samples in this range of thermal conductivity, using a reference sample with a previously measured Seebeck coefficient and thermal conductivity. The results were found to agree with the calibration performed using multiple samples of known thermal conductivity between 0.36 and 1.1 W K(-1) m(-1). However, for samples in the range between 16.2 W K(-1) m(-1) and 53.7 W K(-1) m(-1), calibration experiments showed the contact parameters to have considerably different values: R(th)C = 40,191 ± 1532 K W(-1) and b = 428 ± 24 nm. Finally, this work demonstrates that using these calibration procedures, measurements of both highly conductive and thermally insulating films on substrates can be performed, as the measured values obtained were within 1-20% (for low k) and 5-31% (for high k) of independent measurements and/or literature reports. Thermal conductivity results are presented for a SiGe film on a glass substrate, Te film on a glass substrate, polymer films (doped with Fe nano-particles and undoped) on a glass substrate, and Au film on a Si substrate.

Correction: Decrease in thermal conductivity in polymeric P3HT nanowires by size-reduction induced by crystal orientation: new approaches towards thermal transport engineering of organic materials.

Correction for 'Decrease in thermal conductivity in polymeric P3HT nanowires by size-reduction induced by crystal orientation: new approaches towards thermal transport engineering of organic materials' by Miguel Muñoz Rojo et al., Nanoscale, 2014, 6, 7858-7865.

Quantitative nanoscale surface voltage measurement on organic semiconductor blends.

We report on the validation of a method based on Kelvin probe force microscopy (KPFM) able to measure the different phases and the relative work function of polymer blend heterojunctions at the nanoscale. The method does not necessitate complex ultra-high vacuum setup. The quantitative information that can be extracted from the topography and the Kelvin probe measurements is critically analysed. Surface voltage difference can be observed at the nanoscale on poly(3-hexyl-thiophene):[6,6]-phenyl-C61-butyric acid methyl ester (P3HT:PCBM) blends and dependence on the annealing condition and the regio-regularity of P3HT is observed.