RESUMEN
This work was devoted to the development of a Ge quantum dot memory structure of a MOSFET type with laterally ordered Ge quantum dots within the gate dielectric stack. Lateral ordering of the Ge dots was achieved by the combination of the following technological steps: (a) use of a focused ion beam (FIB) to create ordered two-dimensional arrays of regular holes on a field oxide on the silicon substrate, (b) chemical cleaning and restoring of the Si surface in the holes, (c) further oxidation to transfer the pattern from the field oxide to the silicon substrate, (d) removal of the field oxide and thermal re-oxidation of the sample in order to create a tunneling oxide of homogeneous thickness on the patterned silicon surface, and (e) self-assembly of the two-dimensional arrays of Ge dots on the patterned tunneling oxide. The charging properties of the obtained memory structure were characterized by electrical measurements. Charging of the Ge quantum dot layer by electrons injected from the substrate resulted in a large shift in the capacitance-voltage curves of the MOS structure. Charges were stored in deep traps in the charging layer, and consequently the erasing process was difficult, resulting in a limited memory window. The advantages of controlled positioning of the quantum dots in the charging layer will be discussed.
