High-performance bottom-gate poly-Si polysilicon-oxide-nitride-oxide-silicon thin film transistors crystallized by excimer laser irradiation for two-bit nonvolatile memory applications.

High-performance bottom-gate (BG) poly-Si polysilicon-oxide-nitride-oxide-silicon (SONOS) TFTs with single grain boundary perpendicular to the channel direction have been demonstrated via simple excimer-laser-crystallization (ELC) method. Under an appropriate laser irradiation energy density, the silicon grain growth started from the thicker sidewalls intrinsically caused by the bottom-gate structure and impinged in the center of the channel. Therefore, the proposed ELC BG SONOS TFTs exhibited superior transistor characteristics than the conventional solid-phase-crystallized ones, such as higher field effect mobility of 393 cm2/V-s and steeper subthreshold swing of 0.296 V/dec. Due to the high field effect mobility, the electron velocity, impact ionization, and conduction current density could be enhanced effectively, thus improving the memory performance. Based on this mobility-enhanced scheme, the proposed ELC BG SONOS TFTs exhibited better performance in terms of relatively large memory window, high program/erase speed, long retention time, and 2-bit operation. Such an ELC BG SONOS TFT with single-grain boundary in the channel is compatible with the conventional a-Si TFT process and therefore very promising for the embedded memory in the system-on-panel applications.

High-performance polycrystalline silicon thin-film transistors with two-dimensional location control of the grain boundary via excimer laser crystallization.

High-performance low-temperature polycrystalline silicon (Poly-Si) thin-film transistors (TFTs) have been fabricated with two-dimensional (2-D) location-controlled grain boundaries using excimer laser crystallization (ELC). By locally increased thickness of the amorphous silicon (a-Si) film that was served as the seed crystals with a partial-melting crystallization scheme, the cross-shaped grain boundary structures were produced between the thicker a-Si grids. The Poly-Si TFTs with one parallel and one perpendicular grain boundary along the channel direction could therefore be fabricated to reach excellent field-effect mobility of 530 cm2/V-s while the conventional ones exhibited field-effect mobility of 198 cm2/V-s. Furthermore, the proposed TFTs achieved not only superior electric properties but also improved uniformity as compared with the conventional ones owing to the artificially controlled locations of grain boundaries.

High-performance ZnO thin-film transistors with location-controlled crystal grains fabricated by low-temperature hydrothermal method.

In this paper, high-performance bottom-gate (BG) thin-film transistors (TFTs) with zinc oxide (ZnO) artificially location-controlled lateral grain growth have been prepared via low-temperature hydrothermal method. For the proper design of source/drain structure of ZnO/Ti/Pt thin films, the grains can be laterally grown from the under-cut ZnO beneath the Ti/Pt layer. Consequently, the single one vertical grain boundary perpendicular to the current flow will be produced in the channel region as the grown grains from the source/drain both sides are impinged. As compared with the conventional sputtered ZnO BG-TFTs, the proposed location-controlled hydrothermal ZnO BG-TFTs (W/L = 250 microm/10 microm) demonstrated the higher field-effect mobility of 6.09 cm2/V x s, lower threshold voltage of 3.67 V, higher on/off current ratio above 10(6), and superior current drivability, reflecting the high-quality ZnO thin films with less grain boundary effect in the channel region.