Efficient Tin-Lead Perovskite Solar Cells with a Ultrawide Usage Windows of Precursor Solution Opened by SnF2.

High quality tin-lead perovskite solar cells (Sn─Pb PSCs) can be fabricated via simple solution processing methods. However, the instability of precursor solutions and their narrow usage windows still pose challenges in manufacturing efficient and reproducible Sn─Pb PSCs, hindering the commercialization of PSCs. Fluorine tin (SnF2 ) is widely used as an antioxidant to improve the crystallinity of perovskite. In this study, another role of SnF2 as a stabilizer is found to restrain the deprotonation of methylammonium iodide (MAI) in the precursor solution, which improves their stability and expands their usage windows. Due to the inhibition of SnF2 on oxidation and deprotonation, stable large-sized colloidal clusters form gradually in perovskite precursor solution during aging, leading to uniform nucleation/crystallization during film growth, significantly reducing the roughness and defect density in the films. Because of the competitive deprotonation and oxidation process of Sn2+ , the benefit of larger cluster maximizes after about ten days storage of precursor solution. The champion efficiency of Sn─Pb PSCs prepared with 10 days aged precursor solution is 22.00%. High performance of devices fabricated with precursor solution stored for even ≈40 days discloses the wide usage windows of precursor solution with SnF2 additive.

Full hardware implementation of neuromorphic visual system based on multimodal optoelectronic resistive memory arrays for versatile image processing.

In-sensor and near-sensor computing are becoming the next-generation computing paradigm for high-density and low-power sensory processing. To fulfil a high-density and efficient neuromorphic visual system with fully hierarchical emulation of the retina and visual cortex, emerging multimodal neuromorphic devices for multi-stage processing and a fully hardware-implemented system with versatile image processing functions are still lacking and highly desirable. Here we demonstrate an emerging multimodal-multifunctional resistive random-access memory (RRAM) device array based on modified silk fibroin protein (MSFP), exhibiting both optoelectronic RRAM (ORRAM) mode featured by unique negative and positive photoconductance memory and electrical RRAM (ERRAM) mode featured by analogue resistive switching. A full hardware implementation of the artificial visual system with versatile image processing functions is realised for the first time, including ORRAM mode array for the in-sensor image pre-processing (contrast enhancement, background denoising, feature extraction) and ERRAM mode array for near-sensor high-level image recognition, which hugely improves the integration density, and simply the circuit design and the fabrication and integration complexity.

Quasi-Volatile MoS2 Barristor Memory for 1T Compact Neuron by Correlative Charges Trapping and Schottky Barrier Modulation.

Artificial neurons as the basic units of spiking neural network (SNN) have attracted increasing interest in energy-efficient neuromorphic computing. 2D transition metal dichalcogenide (TMD)-based devices have great potential for high-performance and low-power artificial neural devices, owing to their unique ion motion, interface engineering, and resistive switching behaviors. Although there are widespread applications of TMD-based artificial synapses in neural networks, TMD-based neurons are seldom reported due to the lack of bio-plausible multi-mechanisms to mimic leaking, integrating, and firing biological behaviors without external assistance. In this work, for the first time, a methodology is developed by introducing the hybrid effect of charge trapping (CT) and Schottky barrier (SB) in MoS2 FETs for barristor memory and one-transistor (1T) compact artificial neuron realization. By correlating the CT and SB processes, quasi-volatile and resistive switching behaviors are realized on the fabricated MoS2 FET and utilized to mimic the accumulating, leaking, and firing biological behaviors of neurons. Therefore, based on a single quasi-volatile CT-SB MoS2 barristor memory, a 1T compact neuron of the basic leaky-integral-and-fire (LIF) function is demonstrated without a peripheral circuit. Furthermore, a spiking neural network (SNN) based on the CT-SB MoS2 barristor neurons is simulated and implemented in pattern classification with high accuracy approaching 95.82%. This work provides a highly integrated and inherently low-energy implementation for neural networks.

Improved Ferroelectric Properties in Hf0.5Zr0.5O2 Thin Films by Microwave Annealing.

In the doped hafnia(HfO2)-based films, crystallization annealing is indispensable in forming ferroelectric phases. In this paper, we investigate the annealing effects of TiN/Hf0.5Zr0.5O2/TiN metal-ferroelectric-metal (MFM) capacitors by comparing microwave annealing (MWA) and rapid thermal annealing (RTA) at the same wafer temperature of 500 °C. The twofold remanent polarization (2Pr) of the MWA device is 63 µC/cm2, surpassing that of the RTA device (40 µC/cm2). Furthermore, the wake-up effect is substantially inhibited in the MWA device. The orthorhombic crystalline phase is observed in the annealed HZO films in the MWA and RTA devices, with a reduced TiN and HZO interdiffusion in MWA devices. Moreover, the MFM capacitors subjected to MWA treatment exhibit a lower leakage current, indicating a decreased defect density. This investigation shows the potential of MWA for application in ferroelectric technology due to the improvement in remanent polarization, wake-up effect, and leakage current.

Multi-functional Strategy: Ammonium Citrate-Modified SnO2 ETL for Efficient and Stable Perovskite Solar Cells.

The tin oxide (SnO2) electron transport layer (ETL) plays a crucial role in perovskite solar cells (PSCs). However, the heterogeneous dispersion of commercial SnO2 colloidal precursors is far from optimized, resulting in dissatisfied device performance with SnO2 ETL. Herein, a multifunctional modification material, ammonium citrate (TAC), is used to modify the SnO2 ETL, bringing four benefits: (1) due to the electrostatic interaction between TAC molecules and SnO2 colloidal particles, more uniformly dispersed colloidal particles are obtained; (2) the TAC molecules distributed on the surface of SnO2 provide nucleation sites for the perovskite film growth, promoting the vertical growth of the perovskite crystal; (3) TAC-doped SnO2 shows higher electron conductivity and better film quality than pristine SnO2 while offering better energy-level alignment with the perovskite layer; and (4) TAC has functional groups of C═O and N-H containing lone pair electrons, which can passivate the defects on the surface of SnO2 and perovskite films through chemical bonding and inhibit the device hysteresis. In the end, the device based on TAC-doped ETL achieved an increased power conversion efficiency (PCE) of 21.58 from 19.75% of the reference without such treatment. Meanwhile, the PSCs using the TAC-doped SnO2 as the ETL maintained 88% of their initial PCE after being stored for about 1000 h under dark conditions and controlled RH of 10-25%.

An Inverted Perovskite Solar Cell with Good Comprehensive Performance Realized by Reducing the Concentration of Precursors.

Inverted perovskite solar cells (PSCs) exhibit great potential for industrial application thanks to their low complexity and low fabrication temperature. Aiming at commercial applications, it is necessary to comprehensively consider the material consumption and its corresponding electrical performance. Here, a simple strategy has been proposed to obtain inverted PSCs with comprehensive performance, that is, reaching an acceptable electrical performance by reducing the usage of perovskite. More precisely, the inverted PSCs, whose perovskite film is prepared by 1.0 M precursor, yields a power conversion efficiency (PCE) of 15.50%, fulfilling the requirement for real commercial application. In addition, the thickness of the electron transport layer (C60 in this work) in the above inverted PSCs was further optimized by comparing the simulated absorption spectrum, J-V characteristics and impedance with three different thicknesses of C60 layer. More excitingly, the optimized device displays high storage stability which maintains more than 90% of its initial PCE for 28 days. Therefore, our work provides a simple and cost-effective method to reach good comprehensive performance of inverted PSCs for commercial applications.

A Thermopile Infrared Sensor Array Pixel Monolithically Integrated with an NMOS Switch.

In this article, we present the design, fabrication, and characterization of a thermopile infrared sensor array (TISA) pixel. This TISA pixel is composed of a dual-layer p+/n- poly-Si thermopile with a closed membrane and an n-channel metal oxide semiconductor (NMOS) switch. To address the challenges in fabrication through the 3D integration method, the anode of the thermopile is connected to the drain of the NMOS, both of which are fabricated on the same bulk wafer using a CMOS compatible monolithic integration process. During a single process sequence, deposition, etching, lithography, and ion implantation steps are appropriately combined to fabricate the thermopile and the NMOS simultaneously. At the same time as ensuring high thermoelectric characteristics of the dual-layer p+/n- poly-Si thermopile, the basic switching functions of NMOS are achieved. Compared with a separate thermopile, the experimental results show that the thermopile integrated with the NMOS maintains a quick response, high sensitivity and high reliability. In addition, the NMOS employed as a switch can effectively and quickly control the readout of the thermopile sensing signal through the voltage, both on and off, at the gate of NMOS. Thus, such a TISA pixel fabricated by the monolithic CMOS-compatible integration approach is low-cost and high-performance, and can be applied in arrays for high-volume production.

A Polarization-Switching, Charge-Trapping, Modulated Arithmetic Logic Unit for In-Memory Computing Based on Ferroelectric Fin Field-Effect Transistors.

Nonvolatile logic devices are crucial for the development of logic-in-memory (LiM) technology to build the next-generation non-von Neumann computing architecture. Ferroelectric field-effect transistors (Fe FET) are one of the most promising candidates for LiMs because of high compatibility with mainstream silicon-based complementary metal-oxide semiconductor processes, nonvolatile memory, and low power consumption. However, because of the unipolar characteristics of a Fe FET, a nonlinear XOR or XNOR logic gate function is difficult to realize with a single device. In addition, because single Fe polarization switch modulation is available in the devices, a reconfigurable logic gate usually needs multiple devices to construct and realize fewer logic functions. Here, we introduced polarization-switching (PS) and charge-trapping (CT) effects in a single Fe FET and fabricated a multi-field-effect transistor with bipolar-like characteristics based on advanced 10 nm node fin field-effect transistors (PS-CT FinFET) with 9 nm thick Hf0.5Zr0.5O2 films. The special hybrid effects of charge-trapping and polarization-switching enabled eight Boolean logic functions with a single PS-CT FinFET and 16 Boolean logic functions with two complementary PS-CT FinFETs were obtained with three operations. Furthermore, reconfigurable full 1 bit adder and subtractor functions were demonstrated by connecting only two n-type and two p-type PS-CT FinFET devices, indicating that the technology was promising for LiM applications.

Optimization of Structure and Electrical Characteristics for Four-Layer Vertically-Stacked Horizontal Gate-All-Around Si Nanosheets Devices.

In this paper, the optimizations of vertically-stacked horizontal gate-all-around (GAA) Si nanosheet (NS) transistors on bulk Si substrate are systemically investigated. The release process of NS channels was firstly optimized to achieve uniform device structures. An over 100:1 selective wet-etch ratio of GeSi to Si layer was achieved for GeSi/Si stacks samples with different GeSi thickness (5 nm, 10 nm, and 20 nm) or annealing temperatures (≤900 °C). Furthermore, the influence of ground-plane (GP) doping in Si sub-fin region to improve electrical characteristics of devices was carefully investigated by experiment and simulations. The subthreshold characteristics of n-type devices were greatly improved with the increase of GP doping doses. However, the p-type devices initially were improved and then deteriorated with the increase of GP doping doses, and they demonstrated the best electrical characteristics with the GP doping concentrations of about 1 × 1018 cm-3, which was also confirmed by technical computer aided design (TCAD) simulation results. Finally, 4 stacked GAA Si NS channels with 6 nm in thickness and 30 nm in width were firstly fabricated on bulk substrate, and the performance of the stacked GAA Si NS devices achieved a larger ION/IOFF ratio (3.15 × 105) and smaller values of Subthreshold swings (SSs) (71.2 (N)/78.7 (P) mV/dec) and drain-induced barrier lowering (DIBLs) (9 (N)/22 (P) mV/V) by the optimization of suppression of parasitic channels and device's structure.

Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs.

A 16-nm-Lg p-type Gate-all-around (GAA) silicon nanowire (Si NW) metal oxide semiconductor field effect transistor (MOSFET) was fabricated based on the mainstream bulk fin field-effect transistor (FinFET) technology. The temperature dependence of electrical characteristics for normal MOSFET as well as the quantum transport at cryogenic has been investigated systematically. We demonstrate a good gate-control ability and body effect immunity at cryogenic for the GAA Si NW MOSFETs and observe the transport of two-fold degenerate hole sub-bands in the nanowire (110) channel direction sub-band structure experimentally. In addition, the pronounced ballistic transport characteristics were demonstrated in the GAA Si NW MOSFET. Due to the existence of spacers for the typical MOSFET, the quantum interference was also successfully achieved at lower bias.

Coordinated Optical Matching of a Texture Interface Made from Demixing Blended Polymers for High-Performance Inverted Perovskite Solar Cells.

The continuing increase of the efficiency of perovskite solar cells has pushed the internal quantum efficiency approaching 100%, which means the light-to-carrier and then the following carrier transportation and extraction are no longer limiting factors in photoelectric conversion efficiency of perovskite solar cells. However, the optimal efficiency is still far lower than the Shockley-Queisser efficiency limit, especially for those inverted perovskite solar cells, indicating that a significant fraction of light does not transmit into the active perovskite layer to be absorbed there. Here, a planar inverted perovskite solar cell (ITO/PTAA/perovskite/PC61BM/bathocuproine (BCP)/Ag) is chosen as an example, and we show that its external quantum efficiency (EQE) can be significantly improved by simply texturing the poly[bis (4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA) layer. By washing the film prepared from a mixed polymer solution of PTAA and polystyrene (PS), a textured PTAA/perovskite interface is introduced on the light-input side of perovskite to inhibit internal optical reflection. The reduction of optical loss by this simple texture method increases the EQE and then the photocurrent of the ITO/PTAA/perovskite/PC61BM/BCP/Ag device with the magnitude of about 10%. At the same time, this textured PTAA benefits the band edge absorption in this planar solar cell. The large increase of the short-circuit current together with the increase of fill factor pushes the efficiency of this inverted perovskite solar cell from 18.3% up to an efficiency over 20.8%. By using an antireflection coating on glass to let more light into the device, the efficiency is further improved to 21.6%, further demonstrating the importance of light management in perovskite solar cells.