Multi-Channel Gating Chip in 0.18 µm High-Voltage CMOS for Quantum Applications.

A gating circuit for a photonic quantum simulator is introduced. The gating circuit uses a large excess bias voltage of up to 9.9 V and an integrated single-photon avalanche diode (SPAD). Nine channels are monolithically implemented in an application-specific integrated circuit (ASIC) including nine SPADs using 0.18 µm high-voltage CMOS technology. The gating circuit achieves rise and fall times of 480 ps and 280 ps, respectively, and a minimum full-width-at-half-maximum pulse width of 1.26 ns. Thanks to a fast and sensitive comparator, a detection threshold for avalanche events of less than 100 mV is possible. The power consumption of all nine channels is about 250 mW in total. This gating chip is used to characterize the integrated SPADs. A photon detection probability of around 50% at 9.9 V excess bias and for a wavelength of 635 nm is found.

Area and Bandwidth Enhancement of an n+/p-Well Dot Avalanche Photodiode in 0.35 µm CMOS Technology.

This paper presents a CMOS-integrated dot avalanche photodiode (dot-APD) that features a small central n+/p-well hemispherical cathode/p-well structure circularly surrounded by an anode ring. The dot-APD enables wide hemispherical depletion, charge collection from a large volume, and a small multiplication region. These features result in a large light-sensitive area, high responsivity and bandwidth, and exceptionally low junction capacitance. The active area can be further expanded using a multi-dot structure, which is an array of several cathode/p-well dots with a shared anode. Experimental results show that a 5 × 5 multi-dot APD with an active area of 70 µm × 70 µm achieves a bandwidth of 1.8 GHz, a responsivity of 9.7 A/W, and a capacitance of 27 fF. The structure of the multi-dot APD allows for the design of APDs in various sizes that offer high bandwidth and responsivity as an optical detector for various applications while still maintaining a small capacitance.

Indirect Time-of-Flight with GHz Correlation Frequency and Integrated SPAD Reaching Sub-100 µm Precision in 0.35 µm CMOS.

The purpose of this work is to prove the suitability of integrated single-photon avalanche diode (SPAD)-based indirect time-of-flight (iTOF) for sub-100 µm precision depth sensing using a correlation approach with GHz modulation frequencies. For this purpose, a prototype containing a single pixel consisting of an integrated SPAD, quenching circuit, and two independent correlator circuits was fabricated in a 0.35 µm CMOS process and characterized. It achieved a precision of 70 µm and a nonlinearity of less than 200 µm at a received signal power of less than 100 pW. Sub-mm precision was achieved with a signal power of less than 200 fW. These results and the simplicity of our correlation approach underline the great potential of SPAD-based iTOF for future depth sensing applications.

Photon detection probability enhancement using an anti-reflection coating in CMOS-based SPADs.

This work presents a simulation and experimental study of the photon detection probability (PDP) enhancement in CMOS single-photon avalanche diodes (SPADs) using an anti-reflection coating (ARC) above the sensitive area. It is shown how the ARC layer can improve the PDP, not only by improving the optical transmission, but also by eliminating the penetration of the standing wave into a shallow region close to the silicon surface, where the multiplication region of the SPAD is formed. Furthermore, the appropriate ARC layer thickness corresponding to maximum PDP enhancement at different wavelengths over the visible spectrum is extracted to provide insight regarding the ARC selection if different ARC thicknesses are available within the CMOS process.

Noise and Breakdown Characterization of SPAD Detectors with Time-Gated Photon-Counting Operation.

Being ready-to-detect over a certain portion of time makes the time-gated single-photon avalanche diode (SPAD) an attractive candidate for low-noise photon-counting applications. A careful SPAD noise and performance characterization, however, is critical to avoid time-consuming experimental optimization and redesign iterations for such applications. Here, we present an extensive empirical study of the breakdown voltage, as well as the dark-count and afterpulsing noise mechanisms for a fully integrated time-gated SPAD detector in 0.35-µm CMOS based on experimental data acquired in a dark condition. An "effective" SPAD breakdown voltage is introduced to enable efficient characterization and modeling of the dark-count and afterpulsing probabilities with respect to the excess bias voltage and the gating duration time. The presented breakdown and noise models will allow for accurate modeling and optimization of SPAD-based detector designs, where the SPAD noise can impose severe trade-offs with speed and sensitivity as is shown via an example.

Avalanche Transients of Thick 0.35 µm CMOS Single-Photon Avalanche Diodes.

Two types of single-photon avalanche diodes (SPADs) with different diameters are investigated regarding their avalanche behavior. SPAD type A was designed in standard 0.35-µm complementary metal-oxide-semiconductor (CMOS) including a 12-µm thick p- epi-layer with diameters of 50, 100, 200, and 400 µm; and type B was implemented in the high-voltage (HV) line of this process with diameters of 48.2 and 98.2 µm. Each SPAD is wire-bonded to a 0.35-µm CMOS clocked gating chip, which controls charge up to a maximum 6.6-V excess bias, active, and quench phase as well as readout during one clock period. Measurements of the cathode voltage after photon hits at SPAD type A resulted in fall times (80 to 20%) of 10.2 ns for the 50-µm diameter SPAD for an excess bias of 4.2 V and 3.45 ns for the 200-µm diameter device for an excess bias of 4.26 V. For type B, fall times of 8 ns for 48.2-µm diameter and 5.4-V excess bias as well as 2 ns for 98.2-µm diameter and 5.9-V excess bias were determined. In measuring the whole capacitance at the cathode of the SPAD with gating chip connected, the avalanche currents through the detector were calculated. This resulted in peak avalanche currents of, e.g., 1.19 mA for the 100-µm SPAD type A and 1.64 mA for the 98.2-µm SPAD type B for an excess bias of 5 and 4.9 V, respectively.

Detecting WDM visible light signals by a single multi-color photodiode with MIMO processing.

For the first time, to the best of our knowledge, we experimentally demonstrate that multiple-input-multiple-output (MIMO) processing allows using a single photodiode to detect simultaneously a wavelength-division multiplexing (WDM) visible light communications (VLC) signal. The photodiode has a triple junction, and when it is illuminated by a WDM signal, the junctions produce inherently three photocurrents that are unusable for detecting any of the WDM signals. However, by means of linear MIMO processing, we are able to recover the transmitted signals exactly. Bit error rate measurements confirm the effectiveness of the proposed solution. This opens a new scenario for practical WDM-VLC systems.

[The Future of EU Finances After COVID-19]. / Zur Zukunft der EU-Finanzen nach Corona.

The impact of COVID-19 led to changes in EU financing that pose questions about the shape of the future EU "fiscal constitution". The additional Recovery Fund, with the volume of three-fourths of the new seven year budget, will be financed by the first EU borrowing ever. Is this unprecedented fiscal magnitude necessary to compete with China? Or does the EU need to downsize in two directions: (1) in the volume and differentiation of its various tasks and (2) in the equal rights among its 27 member states (01.01.2021). In any case, the COVID-19 shakeup should be incentive for a major reform of the EU finances.

Optical wireless APD receivers in 0.35 µm HV CMOS technology with large detection area.

The development of two high-speed monolithically integrated optical receivers for wireless optical communication is presented from the design phase to the measurement. The first high-speed receiver is the modified previous design with an integrated 200-µm diameter avalanche photodiode. The redesign improved the optical sensitivity by 3.7 dB resulting in the sensitivity of -35.5 dBm at 1 Gbit/s. The second receiver is an avalanche photodiode receiver with increased photodiode diameter of 400 µm with a sensitivity of -34.7 dBm at 1 Gbit/s. The receivers were employed in wireless optical communication experiments under various ambient light conditions. The maximum error free transmission distance is 22 m at 1 Gbit/s OWC link. The limits of the used standard 0.35 µm HV CMOS technology are estimated in terms of maximum possible detection area of avalanche photodiode receiver still capable for Gbit data rates.

Ustilago species causing leaf-stripe smut revisited.

Leaf-stripe smuts on grasses are a highly polyphyletic group within Ustilaginomycotina, occurring in three genera, Tilletia, Urocystis, and Ustilago. Currently more than 12 Ustilago species inciting stripe smuts are recognised. The majority belong to the Ustilago striiformis-complex, with about 30 different taxa described from 165 different plant species. This study aims to assess whether host distinct-lineages can be observed amongst the Ustilago leaf-stripe smuts using nine different loci on a representative set. Phylogenetic reconstructions supported the monophyly of the Ustilago striiformis-complex that causes leaf-stripe and the polyphyly of other leaf-stripe smuts within Ustilago. Furthermore, smut specimens from the same host genus generally clustered together in well-supported clades that often had available species names for these lineages. In addition to already-named lineages, three new lineages were observed, and described as new species on the basis of host specificity and molecular differences: namely Ustilago jagei sp. nov. on Agrostis stolonifera, U. kummeri sp. nov. on Bromus inermis, and U. neocopinata sp. nov. on Dactylis glomerata.

Integrated fiber optical receiver reducing the gap to the quantum limit.

Experimental results of a single-photon avalanche diode (SPAD) based optical fiber receiver integrated in 0.35 µm PIN-photodiode CMOS technology are presented. To cope with the parasitic effects of SPADs an array of four receivers is implemented. The SPADs consist of a multiplication zone and a separate thick absorption zone to achieve a high photon detection probability (PDP). In addition cascoded quenchers allow to use a quenching voltage of twice the usual supply voltage, i.e. 6.6 V instead of 3.3 V, in order to increase the PDP further. Measurements result in sensitivities of -55.7 dBm at a data rate of 50 Mbit/s and -51.6 dBm at 100 Mbit/s for a wavelength of 635 nm and a bit-error ratio of 2 × 10-3, which is sufficient to perform error correction. These sensitivities are better than those of linear-mode APD receivers integrated in the same CMOS technology. These results are a major advance towards direct detection optical receivers working close to the quantum limit.

Synchronous OEIC Integrating Receiver for Optically Reconfigurable Gate Arrays.

A monolithically integrated optoelectronic receiver with a low-capacitance on-chip pin photodiode is presented. The receiver is fabricated in a 0.35 µm opto-CMOS process fed at 3.3 V and due to the highly effective integrated pin photodiode it operates at µW. A regenerative latch acting as a sense amplifier leads in addition to a low electrical power consumption. At 400 Mbit/s, sensitivities of -26.0 dBm and -25.5 dBm are achieved, respectively, for λ = 635 nm and λ = 675 nm (BER = 10(-9) ) with an energy efficiency of 2 pJ/bit.

OWC using a monolithically integrated 200 µm APD OEIC in 0.35 µm BiCMOS technology.

A lens-less receiver with a monolithically integrated avalanche photodiode (APD) in 0.35 µm BiCMOS technology has been developed for establishing an indoor 2 Gb/s optical wireless communication (OWC) over a distance of 6.5 m with a receiving angle of 22°. Immunity toward background light was demonstrated up to 6000 lux. Four additional PIN photodiodes with highly sensitive differential nonlinear transimpedance amplifiers (TIA) were implemented on the receiver chip for centering the highly collimated transmitter beam position.

Vertical triple-junction RGB optical sensor with signal processing based on the determination of the space-charge region borders.

A triple-junction RGB optical sensor with vertically stacked photodiodes and signal processing that provides precise values of the currents generated by blue, green, and red light is presented. The signal processing is based on the determination of the border depths of the space-charge regions of all three photodiodes. A current-mode implementation using current conveyors and variable-gain current amplifiers is introduced. The responsivities of all three photodiodes calculated using the proposed approach are in very good agreement with the measured results.

Automated alignment system for optical wireless communication systems using image recognition.

In this Letter, we describe the realization of a tracked line-of-sight optical wireless communication system for indoor data distribution. We built a laser-based transmitter with adaptive focus and ray steering by a microelectromechanical systems mirror. To execute the alignment procedure, we used a CMOS image sensor at the transmitter side and developed an algorithm for image recognition to localize the receiver's position. The receiver is based on a self-developed optoelectronic integrated chip with low requirements on the receiver optics to make the system economically attractive. With this system, we were able to set up the communication link automatically without any back channel and to perform error-free (bit error rate <10⁻9) data transmission over a distance of 3.5 m with a data rate of 3 Gbit/s.

0.35 µm CMOS avalanche photodiode with high responsivity and responsivity-bandwidth product.

A highly sensitive avalanche photodiode (APD) in 0.35 µm CMOS technology is presented. Due to a thick intrinsic absorption layer, a high responsivity at a low bias voltage, where the avalanche gain is 1, is combined with an excellent avalanche gain at high voltages to achieve a maximum overall responsivity of the APD of more than 10 kA/W. This responsivity exceeds that of other submicrometer CMOS APDs by a factor of more than 700. As a figure of merit the responsivity-bandwidth product is defined, and the achieved value of 23.46 A/W·GHz is 2.4 times higher than the values found in the literature.

An infrastructure for accurate characterization of single-event transients in digital circuits.

We present the architecture and a detailed pre-fabrication analysis of a digital measurement ASIC facilitating long-term irradiation experiments of basic asynchronous circuits, which also demonstrates the suitability of the general approach for obtaining accurate radiation failure models developed in our FATAL project. Our ASIC design combines radiation targets like Muller C-elements and elastic pipelines as well as standard combinational gates and flip-flops with an elaborate on-chip measurement infrastructure. Major architectural challenges result from the fact that the latter must operate reliably under the same radiation conditions the target circuits are exposed to, without wasting precious die area for a rad-hard design. A measurement architecture based on multiple non-rad-hard counters is used, which we show to be resilient against double faults, as well as many triple and even higher-multiplicity faults. The design evaluation is done by means of comprehensive fault injection experiments, which are based on detailed Spice models of the target circuits in conjunction with a standard double-exponential current injection model for single-event transients (SET). To be as accurate as possible, the parameters of this current model have been aligned with results obtained from 3D device simulation models, which have in turn been validated and calibrated using micro-beam radiation experiments at the GSI in Darmstadt, Germany. For the latter, target circuits instrumented with high-speed sense amplifiers have been used for analog SET recording. Together with a probabilistic analysis of the sustainable particle flow rates, based on a detailed area analysis and experimental cross-section data, we can conclude that the proposed architecture will indeed sustain significant target hit rates, without exceeding the resilience bound of the measurement infrastructure.

Zero-bias 40Gbit/s germanium waveguide photodetector on silicon.

We report on lateral pin germanium photodetectors selectively grown at the end of silicon waveguides. A very high optical bandwidth, estimated up to 120GHz, was evidenced in 10 µm long Ge photodetectors using three kinds of experimental set-ups. In addition, a responsivity of 0.8 A/W at 1550 nm was measured. An open eye diagrams at 40Gb/s were demonstrated under zero-bias at a wavelength of 1.55 µm.