Weighted-Sum Operation of Three-Terminal Synapse Transistors in Array Configuration Using Spin-Coated Li-Doped ZrO2 Electrolyte Gate Insulator.

Artificial synapses with ideal functionalities are essential in hardware neural networks to allow for energy-efficient analog computing. Electrolyte-gated transistors (EGTs) are promising candidates for artificial synaptic devices due to their low voltage operations supported by large specific capacitances of electrolyte gate insulators (EGIs). We investigated the synapse transistor employing an In-Ga-Zn-O channel and a Li-doped ZrO2 (LZO) EGI so as to improve the short-term plasticity (STP) and long-term potentiation (LTP). The LZO EGIs showed distinct differences in characteristics depending on the Li doping concentration, and we adopted the optimum doping concentration of 10%. Based on the strong electric double layer effect secured from the LZO, we successfully demonstrated excellent synaptic operations with gradual modulations of excitatory synaptic plasticity with variations in amplitude, width, and number of applied pulse spikes. The introduction of the LZO EGI was verified to improve typical short-term plasticity such as paired-pulse facilitation. Furthermore, by minutely controlling the pulse spike conditions, the conversion to LTP from STP was clearly accomplished while implementing the anti-Hebbian spike timing-dependent plasticity. Finally, the array configuration of synaptic devices, which is essential for realizing neuromorphic computing, was also demonstrated. In a 3 × 3 array architecture, the weighted-sum operation was well emulated to assign multilevels in seven states with the pulse width modulation scheme.

Carbon dioxide gasification characteristics of disposable COVID-19 masks using bubbling fluidized bed reactor.

The global demand for masks has increased significantly owing to COVID-19 and mutated viruses, resulting in a massive amount of mask waste of approximately 490,000 tons per month. Mask waste recycling is challenging because of the composition of multicomponent polymers and iron, which puts them at risk of viral infection. Conventional treatment methods also cause environmental pollution. Gasification is an effective method for processing multicomponent plastics and obtaining syngas for various applications. This study investigated the carbon dioxide gasification and tar removal characteristics of an activated carbon bed using a 1-kg/h laboratory-scale bubble fluidized bed gasifier. The syngas composition was analyzed as 10.52 vol% of hydrogen, 6.18 vol% of carbon monoxide, 12.05 vol% of methane, and 14.44 vol% of hydrocarbons (C2-C3). The results of carbon dioxide gasification with activated carbon showed a tar-reduction efficiency of 49%, carbon conversion efficiency of 45.16%, and cold gas efficiency of 88.92%. This study provides basic data on mask waste carbon dioxide gasification using greenhouse gases as useful product gases.

Improvement in current drivability and stability in nanoscale vertical channel thin-film transistors via band-gap engineering in In-Ga-Zn-O bilayer channel configuration.

Vertical channel thin film transistors (VTFTs) have been expected to be exploited as one of the promising three-dimensional devices demanding a higher integration density owing to their structural advantages such as small device footprints. However, the VTFTs have suffered from the back-channel effects induced by the pattering process of vertical sidewalls, which critically deteriorate the device reliability. Therefore, to reduce the detrimental back-channel effects has been one of the most urgent issues for enhancing the device performance of VTFTs. Here we show a novel strategy to introduce an In-Ga-Zn-O (IGZO) bilayer channel configuration, which was prepared by atomic-layer deposition (ALD), in terms of structural and electrical passivation against the back-channel effects. Two-dimensional electron gas was effectively employed for improving the operational reliability of the VTFTs by inducing strong confinement of conduction electrons at heterojunction interfaces. The IGZO bilayer channel structure was composed of 3 nm-thick In-rich prompt (In/Ga = 4.1) and 12 nm-thick prime (In/Ga = 0.7) layers. The VTFTs using bilayer IGZO channel showed high on/off ratio (4.8 × 109), low SS value (180 mV dec-1), and high current drivability (13.6µAµm-1). Interestingly, the strategic employment of bilayer channel configurations has secured excellent device operational stability representing the immunity against the bias-dependent hysteretic drain current and the threshold voltage instability of the fabricated VTFTs. Moreover, the threshold voltage shifts of the VTFTs could be suppressed from +5.3 to +2.6 V under a gate bias stress of +3 MV cm-1for 104s at 60 °C, when the single layer channel was replaced with the bilayer channel. As a result, ALD IGZO bilayer configuration could be suggested as a useful strategy to improve the device characteristics and operational reliability of VTFTs.

Hydrogen-rich gas production from disposable COVID-19 mask by steam gasification.

Globally, the demand for masks has increased due to the COVID-19 pandemic, resulting in 490,201 tons of waste masks disposed of per month. Since masks are used in places with a high risk of virus infection, waste masks retain the risk of virus contamination. In this study, a 1 kg/h lab-scale (diameter: 0.114 m, height: 1 m) bubbling fluidized bed gasifier was used for steam gasification (temperature: 800 °C, steam/carbon (S/C) ratio: 1.5) of waste masks. The use of a downstream reactor with activated carbon (AC) for tar cracking and the enhancement of hydrogen production was examined. Steam gasification with AC produces syngas with H2, CO, CH4, and CO2 content of 38.89, 6.40, 21.69, and 7.34 vol%, respectively. The lower heating value of the product gas was 29.66 MJ/Nm3 and the cold gas efficiency was 74.55 %. This study showed that steam gasification can be used for the utilization of waste masks and the production of hydrogen-rich gas for further applications.

Roles of Oxygen Interstitial Defects in Atomic-Layer Deposited InGaZnO Thin Films with Controlling the Cationic Compositions and Gate-Stack Processes for the Devices with Subµm Channel Lengths.

Roles of oxygen interstitial defects located in the In-Ga-Zn-O (IGZO) thin films prepared by atomic layer deposition were investigated with controlling the cationic compositions and gate-stack process conditions. It was found from the spectroscopic ellipsometry analysis that the excess oxygens increased with increasing the In contents within the IGZO channels. While the device using the IGZO channel with an In/Ga ratio of 0.2 did not show marked differences with the variations in the oxidant types during the gate-stack formation, the device characteristics were severely deteriorated with increasing the In/Ga ratio to 1.4, when the Al2O3 gate insulator (GI) was prepared with the H2O oxidants (H2O-Al2O3) due to a higher amount of excess oxygen in the channel. Additionally, during the deposition process of the Al-doped ZnO (AZO) gate electrode (GE) replacing from the indium-tin oxide (ITO) GE, the thermal annealing effect at 180 °C facilitated the passivation of oxygen vacancy and the strengthening of metal-oxygen bonding, which could stabilize the TFT operations. From these results, the gate-stack structure employing O3-processed Al2O3 GI (O3-Al2O3) and AZO GE (OA) was suggested to be most suitable for the device using IGZO channel with a higher In content. On the other hand, the device employing H2O-Al2O3 GI and AZO GE exhibited larger negative shifts of threshold voltage (VTH) under positive-bias-temperature stress (PBTS) condition than the device employing O3- Al2O3 GI and ITO GE due to larger hydrogen contents within the gate stacks. Anomalous negative shifts of VTH were accelerated with increasing the In contents of the IGZO channel. When the channel length of the fabricated device were scaled down to submicrometer regime, the OA gate stacks successfully alleviated the short-channel effects.

Implementation of oxide vertical channel TFTs with sub-150 nm channel length using atomic-layer deposited IGZO active and HfO2gate insulator.

We fabricated vertical channel thin film transistors (VTFTs) with a channel length of 130 nm using an ALD In-Ga-Zn-O (IGZO) active channel and high-k HfO2gate insulator layers. Solution-processed SiO2thin film, which exhibited an etch selectivity as high as 4.2 to drain electrode of indium-tin oxide, was introduced as a spacer material. For the formation of near-vertical sidewalls of the spacer patterns, the drain and spacer were successively patterned by means of two-step plasma etching technique using Ar/Cl2and Ar/CF4etch gas species, respectively. The SiO2spacer showed smooth surface morphology (Rq = 0.45 nm) and low leakage current component of 10-6A cm-2at 1 MV cm-1, which were suggested to be appropriate for working as spacer and back-channel. The fabricated VTFT showed sound transfer characteristics and negligible shifts in threshold voltage against the bias stresses of +5 and -5 V for 104s, even though there was abnormal increase in off-currents under the positive-bias stress due to the interactions between hydrogen-related defects and carriers. Despite the technical limitations of patterning process, our fabricated prototype IGZO VTFTs showed good operation stability even with an ultra-short channel length of 130 nm, demonstrating the potential of ALD IGZO thin film as an alternative channel for highly-scaled electronic devices.

Impact of oxide gate electrode for ferroelectric field-effect transistors with metal-ferroelectric-metal-insulator-semiconductor gate stack using undoped HfO2 thin films prepared by atomic layer deposition.

Ferroelectric field-effect transistors (FETs) with a metal-ferroelectric-metal-insulator-semiconductor (MFMIS) gate stack were fabricated and characterized to elucidate the key process parameters and to optimize the process conditions for guaranteeing nonvolatile memory operations of the device when the undoped HfO2 was employed as ferroelectric gate insulator. The impacts of top gate (TG) for the MFM part on the memory operations of the MFMIS-FETs were intensively investigated when the TG was chosen as metal Pt or oxide ITO electrode. The ferroelectric memory window of the MFMIS-FETs with ITO/HfO2/TiN/SiO2/Si gate stack increased to 3.8 V by properly modulating the areal ratio between two MFM and MIS capacitors. The memory margin as high as 104 was obtained during on- and off-program operations with a program pulse duration as short as 1 µs. There was not any marked degradation in the obtained memory margin even after a lapse of retention time of 104 s at 85 °C and repeated program cycles of 10,000. These obtained improvements in memory operations resulted from the fact that the choice of ITO TG could provide effective capping effects and passivate the interfaces.

Ferroelectric Switching in Trilayer Al2O3/HfZrOx/Al2O3 Structure.

Since ferroelectricity has been observed in simple binary oxide material systems, it has attracted great interest in semiconductor research fields such as advanced logic transistors, non-volatile memories, and neuromorphic devices. The location in which the ferroelectric devices are implemented depends on the specific application, so the process constraints required for device fabrication may be different. In this study, we investigate the ferroelectric characteristics of Zr doped HfO2 layers treated at high temperatures. A single HfZrOx layer deposited by sputtering exhibits polarization switching after annealing at a temperature of 850 °C. However, the achieved ferroelectric properties are vulnerable to voltage stress and higher annealing temperature, resulting in switching instability. Therefore, we introduce an ultrathin 1-nm-thick Al2O3 layer at both interfaces of the HfZrOx. The trilayer Al2O3/HfZrOx/Al2O3 structure allows switching parameters such as remnant and saturation polarizations to be immune to sweeping voltage and pulse cycling. Our results reveal that the trilayer not only makes the ferroelectric phase involved in the switching free from pinning, but also preserves the phase even at high annealing temperature. Simultaneously, the ferroelectric switching can be improved by preventing leakage charge.

A semi-automatic cell type annotation method for single-cell RNA sequencing dataset.

Single-cell RNA sequencing (scRNA-seq) has been widely applied to provide insights into the cell-by-cell expression difference in a given bulk sample. Accordingly, numerous analysis methods have been developed. As it involves simultaneous analyses of many cell and genes, efficiency of the methods is crucial. The conventional cell type annotation method is laborious and subjective. Here we propose a semi-automatic method that calculates a normalized score for each cell type based on user-supplied cell type-specific marker gene list. The method was applied to a publicly available scRNA-seq data of mouse cardiac non-myocyte cell pool. Annotating the 35 t-stochastic neighbor embedding clusters into 12 cell types was straightforward, and its accuracy was evaluated by constructing co-expression network for each cell type. Gene Ontology analysis was congruent with the annotated cell type and the corollary regulatory network analysis showed upstream transcription factors that have well supported literature evidences. The source code is available as an R script upon request.

PRC2 Acts as a Critical Timer That Drives Oligodendrocyte Fate over Astrocyte Identity by Repressing the Notch Pathway.

PRC2 creates the repressive mark histone H3 Lys27 trimethylation. Although PRC2 is involved in various biological processes, its role in glial development remains ambiguous. Here, we show that PRC2 is required for oligodendrocyte (OL) differentiation and myelination, but not for OL precursor formation. PRC2-deficient OL lineage cells differentiate into OL precursors, but they fail to trigger the molecular program for myelination, highlighting that PRC2 is essential for directing the differentiation timing of OL precursors. PRC2 null OL lineage cells aberrantly induce Notch pathway genes and acquire astrocytic features. The repression of the Notch pathway restores the myelination program and inhibits abnormal astrocytic differentiation in the PRC2-deficient OL lineage, indicating that Notch is a major target of PRC2. Altogether, our studies propose a specific action of PRC2 as a novel gatekeeper that determines the glial fate choice and the timing of OL lineage progression and myelination by impinging on the Notch pathway.

Comparative studies on vertical-channel charge-trap memory thin-film transistors using In-Ga-Zn-O active channels deposited by sputtering and atomic layer depositions.

Vertical-channel charge-trap memory thin film-transistors (V-CTM TFTs) using oxide semiconductors were fabricated and characterized, in which In-Ga-Zn-O (IGZO) channels were prepared by sputtering and atomic-layer deposition (ALD) methods to elucidate the effects of deposition process. The vertical-channel gate stack of the fabricated device was verified to be well implemented on the vertical sidewall of the spacer patterns due to excellent step-coverage and self-limiting mechanisms of ALD process. The V-CTM TFTs using ALD-IGZO channel exhibited a wide memory window (MW) of 15.0 V at a VGS sweep of ±20 V and a large memory margin of 1.6 × 102 at a program pulse duration as short as 5 ms. The programmed memory margin higher than 105 did not experience any degradation with time evolution for 104 s. The mechanical durability was also evaluated after the delamination process of polyimide (PI) film. There were no marked variations in charge-trap-assisted MW even at a curvature radius of 1 mm and programmed memory margin even after repeated program operations of 104 cycles. The introduction of ALD process for the formation of IGZO active channel was suggested as a main process parameter to ensure the excellent memory device characteristics of the V-CTM TFTs.

Implementation of an electrically modifiable artificial synapse based on ferroelectric field-effect transistors using Al-doped HfO2 thin films.

Human brain-like synaptic behaviors of the ferroelectric field-effect transistors (FeFETs) were emulated by introducing the metal-ferroelectric-metal-insulator-semiconductor (MFMIS) gate stacks employing Al-doped HfO2 (Al:HfO2) ferroelectric thin films even at a low operation voltage. The synaptic plasticity of the MFMIS-FETs could be gradually modulated by the partial polarization characteristics of the Al:HfO2 thin films, which were examined to be dependent on the applied pulse conditions. Based on the ferroelectric polarization switching dynamics of the Al:HfO2 thin films, the proposed devices successfully emulate biological synaptic functions, including excitatory post-synaptic current (EPSC), paired-pulse facilitation (PPF), and spike timing-dependent plasticity (STDP). The channel conductance of the FeFETs could be controlled by partially switching the ferroelectric polarization of the Al:HfO2 gate insulators by means of pulse-number and pulse-amplitude modulations. Furthermore, the 3 × 3 array integrated with the Al:HfO2 MFMIS-FETs was also fabricated, in which electrically modifiable weighted-sum operation could be well verified in the 3 × 3 synapse array configuration.

Impact of Polyimide Film Thickness for Improving the Mechanical Robustness of Stretchable InGaZnO Thin-Film Transistors Prepared on Wavy-Dimensional Elastomer Substrates.

We report on the In-Ga-Zn-O thin-film transistors (IGZO TFTs) with outstanding mechanical stretchability, which were fabricated on ultrathin polyimide (PI) film/prestrained elastomer with a wavy-dimensional structure. The device characteristics of the fabricated devices were evaluated under mechanically strained conditions with various strains. The operational reliabilities against the bias stress conditions and during the cyclic stretching tests were also carefully examined. The stretchable IGZO TFTs exhibited good device operations without any marked degradation under stretching/compressed conditions with a strain of 40%. Under positive bias stress with a prestrain of 50%, the turn-on voltage instabilities for the TFTs prepared on 0.9 and 2.0 µm-thick PI films were estimated to be 1.5 and 3.9 V, respectively. During the cyclic stretching tests with a strain of 50%, the device operations failed after 20,000 and 100,000 stretching cycles for the TFTs fabricated on 2.0 and 0.9 µm-thick PI films, respectively. As a result, the IGZO TFTs fabricated on a thinner PI film presented more reliable operations after the repeated stretching events. The robust mechanical stretchability dependent on the PI film thickness was suggested to be due to the difference in critical values of bending radii and the influence of the local strain induced by the spatial fluctuations of the wavy structures.

Nitrogen Doping Effect for Improving Operation Reliability of Phase Modulator Using Ge2Sb2Te5 Thin Film for Hologram Image Implementation.

A phase modulation device was proposed for the implementation of hologram image for display applications. A Ge2Sb2Te5 (GST) film as thin as 7 nm was prepared between the ITO films to form the cavities corresponding a unit pixel. Nitrogen was incorporated into the GST for improving the thermal stability of the GST active region. The effects of the nitrogen doping on the physical properties of GST was investigated with the variations in doping amounts. The nitrogen incorporation was found to reduce the surface micro-roughness and to improve the thermal stability of the GST even after the crystallization by effectively suppressing the excessive grain growth. As results, the number of repeatable operations for the fabricated phase modulation device was evidently improved from 10 to 69 cycles when a 2.7-at% nitrogen was doped into the GST.

Investigations on the bias temperature stabilities of oxide thin film transistors using In-Ga-Zn-O channels prepared by atomic layer deposition.

Bias temperature stress stabilities of thin-film transistors (TFTs) using In-Ga-Zn-O (IGZO) channels prepared by the atomic layer deposition process were investigated with varying channel thicknesses (10 and 6 nm). Even when the IGZO channel thickness was reduced to 6 nm, the device exhibited good characteristics with a high saturation mobility of 15.1 cm2 V-1 s-1 and low sub-threshold swing of 0.12 V dec-1. Excellent positive and negative bias stress stabilities were also obtained. When positive bias temperature stress (PBTS) stability was tested from 40 to 80 °C for 104 s, the threshold voltages (V TH) of the device using the 6 nm-thick IGZO channel shifted negatively, and the V TH shifts increased from -0.5 to -6.9 V with the increasing temperature. Time-dependent PBTS instabilities could be explained by a stretched-exponential equation, representing a charge-trapping mechanism.

Reliability enhancement in thin film transistors using Hf and Al co-incorporated ZnO active channels deposited by atomic-layer-deposition.

Oxide thin films transistors (TFTs) with Hf and Al co-incorporated ZnO active channels prepared by atomic-layer deposition are presented. The Al concentration was fixed at 2.6 at% and the Hf concentration was varied from 3.3 to 6.3 at%. The HfAlZnO (HAZO) TFTs exhibited positive shifts in turn on voltages toward 0 V with a slight decrease in carrier mobility with increases in the incorporated Hf content and the post-annealing temperature. It was suggested that the carrier concentration and defect densities within the HAZO channels were reduced by incorporating Hf and performing the thermal annealing process. The TFT with HAZO channels with Hf content of 6.3 at% exhibited a turn-on operation at around 0 V and a low SS value of 0.3 V dec-1 without a marked decrease in carrier mobility. Furthermore, the device stabilities under bias, illumination, and temperature stresses could be greatly enhanced by reducing the formation of additional carriers and defects caused by weak Zn-O bonds due to the high binding energy of Hf with oxygen.

Effects of Deposition Temperature on the Device Characteristics of Oxide Thin-Film Transistors Using In-Ga-Zn-O Active Channels Prepared by Atomic-Layer Deposition.

We demonstrated the physical and electrical properties of the In-Ga-Zn-O (IGZO) thin films prepared by atomic-layer deposition (ALD) method and investigated the effects of the ALD temperature. The film composition (atomic ratio of In:Ga:Zn) and film density were examined to be 1:1:3 and 5.9 g/cm3, respectively, for all the temperature conditions. The optical band gaps decreased from 3.81 to 3.21 eV when the ALD temperature increased from 130 to 170 °C. The amounts of oxygen-related defects such as oxygen vacancies increased with increasing the ALD temperature. It was found from the in situ temperature-dependent electrical conductivity measurements that the electronic natures including the defect structures and conduction mechanism of the IGZO thin films prepared at different temperatures showed marked variations. The carrier mobilities in the saturation regions (µsat's) for the fabricated thin film transistors (TFTs) using the IGZO channel layers were estimated to be 6.1 to 14.8 cm2 V-1 s-1 with increasing the ALD temperature from 130 to 170 °C. Among the devices, when the ALD temperature was controlled to be 150 °C, the IGZO TFTs showed the best performance, which resulted from the fact that the amounts of oxygen vacancies and interstitial defects could be appropriately modulated at this condition. Consequently, the µsat, subthreshold swing, and on/off ratio for the TFT using the IGZO channel prepared at 150 °C showed 10.4 cm2 V-1 s-1, 90 mV/dec, and 2 × 109, respectively. The threshold voltage shifts of this device could also be effectively reduced to be 0.6 and -3.2 V under the positive-bias and negative-bias-illumination stress conditions. These obtained characteristics can be comparable to those for the sputter-deposited IGZO TFTs.

Atomic-layer-deposition-assisted ZnO nanoparticles for oxide charge-trap memory thin-film transistors.

ZnO nanoparticles (NPs) with monolayer structures were prepared by atomic layer deposition (ALD) to use for a charge-trap layer (CTL) for nonvolatile memory thin-film transistors (MTFTs). The optimum ALD temperature of the NP formation was demonstrated to be 160 °C. The size and areal density of the ZnO NPs was estimated to be approximately 33 nm and 4.8 × 109 cm-2, respectively, when the number of ALD cycles was controlled to be 20. The fabricated MTFTs using a ZnO-NP CTL exhibited typical memory window properties, which are generated by charge-trap/de-trap processes, in their transfer characteristics and the width of the memory window (MW) increased from 0.6 to 18.0 V when the number of ALD cycles increased from 5 to 30. The program characteristics of the MTFT were markedly enhanced by the post-annealing process performed at 180 °C in an oxygen ambient due to the improvements in the interface and bulk qualities of the ZnO NPs. The program/erase (P/E) speed was estimated to be 10 ms at P/E voltages of -14 and 17 V. The memory margin showed no degradation with the lapse in retention time for 2 × 104 s and after the repetitive P/E operations of 7 × 103 cycles.

Highly Bendable In-Ga-ZnO Thin Film Transistors by Using a Thermally Stable Organic Dielectric Layer.

Flexible In-Ga-ZnO (IGZO) thin film transistor (TFT) on a polyimide substrate is produced by employing a thermally stable SA7 organic material as the multi-functional barrier and dielectric layers. The IGZO channel layer was sputtered at Ar:O2 gas flow rate of 100:1 sccm and the fabricated TFT exhibited excellent transistor performances with a mobility of 15.67 cm2/Vs, a threshold voltage of 6.4 V and an on/off current ratio of 4.5 × 105. Further, high mechanical stability was achieved by the use of organic/inorganic stacking of dielectric and channel layers. Thus, the IGZO transistor endured unprecedented bending strain up to 3.33% at a bending radius of 1.5 mm with no significant degradation in transistor performances along with a superior reliability up to 1000 cycles.

Necessity of Surgical Site Closed Suction Drain for Pterional Craniotomy.

OBJECTIVE: The aim of this study was to assess the benefit of using a prophylactic surgical site closed suction drain in pterional craniotomy. MATERIALS AND METHODS: A retrospective review was conducted on 607 consecutive patients who underwent a pterional craniotomy for treatment of intracranial anterior circulation aneurysms over a 5-year period. Between January 2000 and December 2004, 607 patients were divided into two groups, those who had a prophylactic suction drain during closure of the surgical site (drain group, DG) and those who did not (non-drain group, NDG). Head computed tomography (CT) was taken routinely on postoperative day (POD) 1, 7, and 14. Patients' demographics, incidence of surgical site complications, and courses of surgical site healing which were evaluated radiologically by the thickness of the surgical site myocutaneous layer, were analyzed between DG and NDG. RESULTS: Patients' demographics and characteristics did not differ significantly between the two groups. The head CT showed that the degree of changes in the postoperative surgical site thickness was 148% at POD 1, 209% at POD 7, and 198% at POD 14 in DG, and 118% at POD 1, 152% at POD 7, and 158% at POD 14 in NDG compared to the preoperative value. Postoperative surgical site hematoma was 7.9% (22/274) in DG and 2.4% (8/333) in NDG. CONCLUSION: Prophylactic use of an epidural and/or subgaleal closed suction drain does not appear to be necessary for prevention of postoperative surgical site hematoma as well as for promotion of surgical site healing in pterional craniotomy.