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A Novel Atomic-Level Post-Etch-Surface-Reinforcement Process for High-Performance p-GaN Gate HEMTs Fabrication.
Wang, Luyu; Zhang, Penghao; Zhu, Kaiyue; Wang, Qiang; Pan, Maolin; Sun, Xin; Huang, Ziqiang; Chen, Kun; Yang, Yannan; Xie, Xinling; Huang, Hai; Hu, Xin; Xu, Saisheng; Wu, Chunlei; Wang, Chen; Xu, Min; Zhang, David Wei.
Affiliation
  • Wang L; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Zhang P; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Zhu K; Imperial College London, London SW7 2AZ, UK.
  • Wang Q; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Pan M; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Sun X; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Huang Z; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Chen K; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Yang Y; Shanghai Integrated Circuit Manufacturing Innovation Center Co., Ltd., Shanghai 200433, China.
  • Xie X; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Huang H; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Hu X; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Xu S; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Wu C; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Wang C; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
  • Xu M; Shanghai Integrated Circuit Manufacturing Innovation Center Co., Ltd., Shanghai 200433, China.
  • Zhang DW; State Key Laboratory of ASIC and System, Shanghai Institute of Intelligent Electronics & Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
Nanomaterials (Basel) ; 13(16)2023 Aug 08.
Article in En | MEDLINE | ID: mdl-37630860
ABSTRACT
A novel atomic-level post-etch-surface-reinforcement (PESR) process is developed to recover the p-GaN etching induced damage region for high performance p-GaN gate HEMTs fabrication. This process is composed of a self-limited surface modification step with O2 plasma, following by an oxide removal step with BCl3 plasma. With PESR process, the AlGaN surface morphology after p-GaN etching was comparable to the as-epitaxial level by AFM characterization, and the AlGaN lattice crystallization was also recovered which was measured in a confocal Raman system. The electrical measurement further confirmed the significant improvement of AlGaN surface quality, with one-order of magnitude lower surface leakage in a metal-semiconductor (MS) Schottky-diode and 6 times lower interface density of states (Dit) in a MIS C-V characterization. The XPS analysis of Al2O3/AlGaN showed that the p-GaN etching induced F-byproduct and Ga-oxide was well removed and suppressed by PESR process. Finally, the developed PESR process was successfully integrated in p-GaN gate HEMTs fabrication, and the device performance was significantly enhanced with ~20% lower of on-resistance and ~25% less of current collapse at Vds,Q bias of 40 V, showing great potential of leverage p-GaN gate HEMTs reliability.
Key words

Full text: 1 Collection: 01-internacional Database: MEDLINE Language: En Journal: Nanomaterials (Basel) Year: 2023 Document type: Article Affiliation country: China

Full text: 1 Collection: 01-internacional Database: MEDLINE Language: En Journal: Nanomaterials (Basel) Year: 2023 Document type: Article Affiliation country: China