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Identifying atomically thin isolated-band channels for intrinsic steep-slope transistors by high-throughput study.
Qu, Hengze; Zhang, Shengli; Cao, Jiang; Wu, Zhenhua; Chai, Yang; Li, Weisheng; Li, Lain-Jong; Ren, Wencai; Wang, Xinran; Zeng, Haibo.
Affiliation
  • Qu H; MIIT Key Laboratory of Advanced Display Materials and Devices, College of Material Science and Engineering, Nanjing University of Science and Technology, Nanjing 210094, China.
  • Zhang S; MIIT Key Laboratory of Advanced Display Materials and Devices, College of Material Science and Engineering, Nanjing University of Science and Technology, Nanjing 210094, China. Electronic address: zhangslvip@njust.edu.cn.
  • Cao J; School of Electronic and Optical Engineering, Nanjing University of Science and Technology, Nanjing 210094, China.
  • Wu Z; Key Laboratory of Microelectronics Device and Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences, Beijing 100029, China.
  • Chai Y; Department of Applied Physics, The Hong Kong Polytechnic University, Hong Kong 999077, China.
  • Li W; National Laboratory of Solid State Microstructures, School of Electronic Science and Engineering and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210023, China.
  • Li LJ; Department of Mechanical Engineering, The University of Hong Kong, Hong Kong 999077, China.
  • Ren W; Shenyang National Laboratory for Materials Science, Institute of Metal Research, Chinese Academy of Sciences, Shenyang 110016, China.
  • Wang X; National Laboratory of Solid State Microstructures, School of Electronic Science and Engineering and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210023, China; School of Integrated Circuits, Nanjing University, Suzhou 215163, China; Suzhou Laboratory, Suz
  • Zeng H; MIIT Key Laboratory of Advanced Display Materials and Devices, College of Material Science and Engineering, Nanjing University of Science and Technology, Nanjing 210094, China. Electronic address: zeng.haibo@njust.edu.cn.
Sci Bull (Beijing) ; 69(10): 1427-1436, 2024 May 30.
Article in En | MEDLINE | ID: mdl-38531717
ABSTRACT
Developing low-power FETs holds significant importance in advancing logic circuits, especially as the feature size of MOSFETs approaches sub-10 nanometers. However, this has been restricted by the thermionic limitation of SS, which is limited to 60 mV per decade at room temperature. Herein, we proposed a strategy that utilizes 2D semiconductors with an isolated-band feature as channels to realize sub-thermionic SS in MOSFETs. Through high-throughput calculations, we established a guiding principle that combines the atomic structure and orbital interaction to identify their sub-thermionic transport potential. This guides us to screen 192 candidates from the 2D material database comprising 1608 systems. Additionally, the physical relationship between the sub-thermionic transport performances and electronic structures is further revealed, which enables us to predict 15 systems with promising device performances for low-power applications with supply voltage below 0.5 V. This work opens a new way for the low-power electronics based on 2D materials and would inspire extensive interests in the experimental exploration of intrinsic steep-slope MOSFETs.
Key words

Full text: 1 Collection: 01-internacional Database: MEDLINE Language: En Journal: Sci Bull (Beijing) Year: 2024 Document type: Article Affiliation country: China

Full text: 1 Collection: 01-internacional Database: MEDLINE Language: En Journal: Sci Bull (Beijing) Year: 2024 Document type: Article Affiliation country: China