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Reconfigurable aJ-Level Ferroelectric Transistor-Based Boolean Logic for Logic-in-Memory.
Zhao, Ruiting; Liu, Houfang; Yang, Mingdong; Lu, Tian; Li, Zhirui; Shi, Zeqi; Wang, Zhenze; Liu, Junwei; Yang, Yi; Ren, Tian-Ling.
Affiliation
  • Zhao R; School of Integrated Circuits and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing 100084, People's Republic of China.
  • Liu H; School of Integrated Circuits and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing 100084, People's Republic of China.
  • Yang M; School of Integrated Circuits and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing 100084, People's Republic of China.
  • Lu T; School of Integrated Circuits and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing 100084, People's Republic of China.
  • Li Z; School of Integrated Circuits and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing 100084, People's Republic of China.
  • Shi Z; School of Integrated Circuits and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing 100084, People's Republic of China.
  • Wang Z; School of Integrated Circuits and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing 100084, People's Republic of China.
  • Liu J; School of Integrated Circuits and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing 100084, People's Republic of China.
  • Yang Y; School of Integrated Circuits and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing 100084, People's Republic of China.
  • Ren TL; School of Integrated Circuits and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing 100084, People's Republic of China.
Nano Lett ; 24(35): 10957-10963, 2024 Sep 04.
Article de En | MEDLINE | ID: mdl-39171725
ABSTRACT
Logic-in-memory (LIM) architecture holds great potential to break the von Neumann bottleneck. Despite the extensive research on novel devices, challenges persist in developing suitable engineering building blocks for such designs. Herein, we propose a reconfigurable strategy for efficient implementation of Boolean logics based on a hafnium oxide-based ferroelectric field effect transistor (HfO2-based FeFET). The logic results are stored within the device itself (in situ) during the computation process, featuring the key characteristics of LIM. The fast switching speed and low power consumption of a HfO2-based FeFET enable the execution of Boolean logics with an ultralow energy of lower than 8 attojoule (aJ). This represents a significant milestone in achieving aJ-level computing energy consumption. Furthermore, the system demonstrates exceptional reliability with computing endurance exceeding 108 cycles and retention properties exceeding 1000 s. These results highlight the remarkable potential of a FeFET for the realization of high performance beyond the von Neumann LIM computing architectures.
Mots clés

Texte intégral: 1 Collection: 01-internacional Base de données: MEDLINE Langue: En Journal: Nano Lett Année: 2024 Type de document: Article Pays de publication: États-Unis d'Amérique

Texte intégral: 1 Collection: 01-internacional Base de données: MEDLINE Langue: En Journal: Nano Lett Année: 2024 Type de document: Article Pays de publication: États-Unis d'Amérique