RESUMO
Quantum computation features known examples of hardware acceleration for certain problems, but is challenging to realize because of its susceptibility to small errors from noise or imperfect control. The principles of fault tolerance may enable computational acceleration with imperfect hardware, but they place strict requirements on the character and correlation of errors1. For many qubit technologies2-21, some challenges to achieving fault tolerance can be traced to correlated errors arising from the need to control qubits by injecting microwave energy matching qubit resonances. Here we demonstrate an alternative approach to quantum computation that uses energy-degenerate encoded qubit states controlled by nearest-neighbour contact interactions that partially swap the spin states of electrons with those of their neighbours. Calibrated sequences of such partial swaps, implemented using only voltage pulses, allow universal quantum control while bypassing microwave-associated correlated error sources1,22-28. We use an array of six 28Si/SiGe quantum dots, built using a platform that is capable of extending in two dimensions following processes used in conventional microelectronics29. We quantify the operational fidelity of universal control of two encoded qubits using interleaved randomized benchmarking30, finding a fidelity of 96.3% ± 0.7% for encoded controlled NOT operations and 99.3% ± 0.5% for encoded SWAP. The quantum coherence offered by enriched silicon5-9,16,18,20,22,27,29,31-37, the all-electrical and low-crosstalk-control of partial swap operations1,22-28 and the configurable insensitivity of our encoding to certain error sources28,33,34,38 all combine to offer a strong pathway towards scalable fault tolerance and computational advantage.
RESUMO
Spin-based silicon quantum dots are an attractive qubit technology for quantum information processing with respect to coherence time, control, and engineering. Here we present an exchange-only Si qubit device platform that combines the throughput of CMOS-like wafer processing with the versatility of direct-write lithography. The technology, which we coin "SLEDGE", features dot-shaped gates that are patterned simultaneously on one topographical plane and subsequently connected by vias to interconnect metal lines. The process design enables nontrivial layouts as well as flexibility in gate dimensions, material selection, and additional device features such as for rf qubit control. We show that the SLEDGE process has reduced electrostatic disorder with respect to traditional overlapping gate devices with lift-off metallization, and we present spin coherent exchange oscillations and single qubit blind randomized benchmarking data.