Ultrathin ferroic HfO2-ZrO2 superlattice gate stack for advanced transistors.

With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage1. This led to a fundamental change in the gate stack in 2008, the incorporation of high-dielectric-constant HfO2 (ref. 2), which remains the material of choice to date. Here we report HfO2-ZrO2 superlattice heterostructures as a gate stack, stabilized with mixed ferroelectric-antiferroelectric order, directly integrated onto Si transistors, and scaled down to approximately 20 ångströms, the same gate oxide thickness required for high-performance transistors. The overall equivalent oxide thickness in metal-oxide-semiconductor capacitors is equivalent to an effective SiO2 thickness of approximately 6.5 ångströms. Such a low effective oxide thickness and the resulting large capacitance cannot be achieved in conventional HfO2-based high-dielectric-constant gate stacks without scavenging the interfacial SiO2, which has adverse effects on the electron transport and gate leakage current3. Accordingly, our gate stacks, which do not require such scavenging, provide substantially lower leakage current and no mobility degradation. This work demonstrates that ultrathin ferroic HfO2-ZrO2 multilayers, stabilized with competing ferroelectric-antiferroelectric order in the two-nanometre-thickness regime, provide a path towards advanced gate oxide stacks in electronic devices beyond conventional HfO2-based high-dielectric-constant materials.

Reconfigurable van der Waals Heterostructured Devices with Metal-Insulator Transition.

Atomically thin two-dimensional (2D) materials range from semimetallic graphene to insulating hexagonal boron nitride to semiconducting transition-metal dichalcogenides. Recently, metal-insulator-semiconductor field effect transistors built from these 2D elements were studied for flexible and transparent electronics. However, to induce ambipolar characteristics for alternative power-efficient circuitry, ion-gel gating is often employed for high capacitive coupling, limiting stable operation at ambient conditions. Here, we report reconfigurable MoTe2 optoelectronic transistors with all 2D components, where the device can be reconfigured by both drain and gate voltages. Eight different configurations for each fixed voltage are spatially resolved by scanning photocurrent microscopy. In addition, metal-insulator transitions are observed in both electron and hole carriers under 2 V due to strong Coulomb interaction in the system. Furthermore, the vertical tunneling photocurrent through multiple van der Waals layers between the gate and source contacts is measured. Our reconfigurable devices offer potential building blocks for system-on-a-chip optoelectronics.

Local and nonlocal Fraunhofer-like pattern from an edge-stepped topological surface Josephson current distribution.

We report a surface-dominant Josephson effect in superconductor-topological insulator-superconductor (S-TI-S) devices, where a Bi1.5Sb0.5Te1.7Se1.3 (BSTS) crystal flake was adopted as an intervening TI between Al superconducting electrodes. We observed a Fraunhofer-type critical current modulation in a perpendicular magnetic field in an Al-TI-Al junction for both local and nonlocal current biasing. Fraunhofer-type modulation of the differential resistance was also observed in a neighboring Au-TI-Au normal junction when it was nonlocally biased by the Al-TI-Al junction. In all cases, the Fraunhofer-like signal was highly robust to the magnetic field up to the critical field of the Al electrodes, corresponding to the edge-stepped nonuniform supercurrent density arising from the top and rough side surfaces of the BSTS flake, which strongly suggests that the Josephson coupling in a TI is established through the surface conducting channels that are topologically protected.

Thermoelectric detection of chiral heat transport in graphene in the quantum Hall regime.

We report measurements of heat transport along the edge conducting channels in monolayer graphene in the integer quantum Hall regime. Hot charge carriers are injected to the edge channels, and the thermoelectric voltage is measured at a distance along the edge from the heat injection point. We confirm that heat transport in graphene in the quantum Hall regime is chiral and the thermoelectric signal is correlated with the charge conductance of ballistic transport, following the Mott relation. The thermoelectric signal decays with distance from the heater, indicating that carriers are partially thermalized during edge transmission.

Breakdown of the interlayer coherence in twisted bilayer graphene.

Coherent motion of electrons in Bloch states is one of the fundamental concepts of charge conduction in solid-state physics. In layered materials, however, such a condition often breaks down for the interlayer conduction, when the interlayer coupling is significantly reduced by, e.g., a large interlayer separation. We report that complete suppression of coherent conduction is realized even in an atomic length scale of layer separation in twisted bilayer graphene. The interlayer resistivity of twisted bilayer graphene is much higher than the c-axis resistivity of Bernal-stacked graphite and exhibits strong dependence on temperature as well as on external electric fields. These results suggest that the graphene layers are significantly decoupled by rotation and incoherent conduction is a main transport channel between the layers of twisted bilayer graphene.

Revival of Ferroelectric Memories Based on Emerging Fluorite-Structured Ferroelectrics.

Over the last few decades, the research on ferroelectric memories has been limited due to their dimensional scalability and incompatibility with complementary metal-oxide-semiconductor (CMOS) technology. The discovery of ferroelectricity in fluorite-structured oxides revived interest in the research on ferroelectric memories, by inducing nanoscale nonvolatility in state-of-the-art gate insulators by minute doping and thermal treatment. The potential of this approach has been demonstrated by the fabrication of sub-30 nm electronic devices. Nonetheless, to realize practical applications, various technical limitations, such as insufficient reliability including endurance, retention, and imprint, as well as large device-to-device-variation, require urgent solutions. Furthermore, such limitations should be considered based on targeting devices as well as applications. Various types of ferroelectric memories including ferroelectric random-access-memory, ferroelectric field-effect-transistor, and ferroelectric tunnel junction should be considered for classical nonvolatile memories as well as emerging neuromorphic computing and processing-in-memory. Therefore, from the viewpoint of materials science, this review covers the recent research focusing on ferroelectric memories from the history of conventional approaches to future prospects.

Ballistic transport of graphene pnp junctions with embedded local gates.

We fabricated graphene pnp devices, by embedding pre-defined local gates in an oxidized surface layer of a silicon substrate. With neither deposition of dielectric material on the graphene nor electron-beam irradiation, we obtained high-quality graphene pnp devices without degradation of the carrier mobility even in the local-gate region. The corresponding increased mean free path leads to the observation of ballistic and phase-coherent transport across a local gate 130 nm wide, which is about an order of magnitude wider than reported previously. Furthermore, in our scheme, we demonstrated independent control of the carrier density in the local-gate region, with a conductance map very much distinct from those of top-gated devices. This was caused by the electric field arising from the global back gate being strongly screened by the embedded local gate. Our scheme allows the realization of ideal multipolar graphene junctions with ballistic carrier transport.

Fermi Level Pinning at Electrical Metal Contacts of Monolayer Molybdenum Dichalcogenides.

Electrical metal contacts to two-dimensional (2D) semiconducting transition metal dichalcogenides (TMDCs) are found to be the key bottleneck to the realization of high device performance due to strong Fermi level pinning and high contact resistances (Rc). Until now, Fermi level pinning of monolayer TMDCs has been reported only theoretically, although that of bulk TMDCs has been reported experimentally. Here, we report the experimental study on Fermi level pinning of monolayer MoS2 and MoTe2 by interpreting the thermionic emission results. We also quantitatively compared our results with the theoretical simulation results of the monolayer structure as well as the experimental results of the bulk structure. We measured the pinning factor S to be 0.11 and -0.07 for monolayer MoS2 and MoTe2, respectively, suggesting a much stronger Fermi level pinning effect, a Schottky barrier height (SBH) lower than that by theoretical prediction, and interestingly similar pinning energy levels between monolayer and bulk MoS2. Our results further imply that metal work functions have very little influence on contact properties of 2D-material-based devices. Moreover, we found that Rc is exponentially proportional to SBH, and these processing parameters can be controlled sensitively upon chemical doping into the 2D materials. These findings provide a practical guideline for depinning Fermi level at the 2D interfaces so that polarity control of TMDC-based semiconductors can be achieved efficiently.