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1.
Nanotechnology ; 25(20): 205201, 2014 May 23.
Artigo em Inglês | MEDLINE | ID: mdl-24784161

RESUMO

We successfully fabricated ferroelectric-gate field effect transistor (FEFET)-based nonvolatile memory devices using an n-type Si nanowire coated with omega-shaped-gate organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) via a low-temperature fabrication process. Our FEFET memory devices with controllable threshold voltage via adjustment of the doping concentration exhibit excellent memory characteristics with ultra-low ON state power dissipation (≤3 nW), a large modulation in channel conductance between the ON and OFF states exceeding 10(5), a long retention time of over 3 × 10(4) s and a high endurance of over 10(5) programming cycles whilst maintaining an I ON/I OFF ratio higher than 10(3). This result may be promising for next-generation nonvolatile memory on flexible substrate applications.

2.
Front Bioeng Biotechnol ; 10: 917573, 2022.
Artigo em Inglês | MEDLINE | ID: mdl-35992344

RESUMO

The COVID-19 pandemic emphasized the importance of rapid, portable, and on-site testing technologies necessary for resource-limited settings for effective testing and screening to reduce spreading of the infection. Realizing this, we developed a fluorescence-based point-of-care (fPOC) detection system with real-time reverse transcriptase loop-mediated isothermal amplification for rapid and quantitative detection of the severe acute respiratory syndrome coronavirus 2 (SARS-CoV-2) virus. The system is built based on the Arduino platform compatible with commercially available open-source hardware-software and off-the-shelf electronic components. The fPOC system comprises of three main components: 1) an instrument with integrated heaters, 2) optical detection components, and 3) an injection-molded polymeric cartridge. The system was tested and experimentally proved to be able to use for fast detection of the SARS-CoV-2 virus in real-time in less than 30 min. Preliminary results of testing the performance of the fPOC revealed that the fPOC could detect the SARS-CoV-2 virus at a limit of detection (LOD50%) at two to three copies/microliter (15.36 copies/reaction), which was comparable to reactions run on a standard commercial thermocycler. The performance of the fPOC was evaluated with 12 SARS-CoV-2 clinical throat swab samples that included seven positive and five negative samples, as confirmed by reverse transcription-polymerase chain reaction. The fPOC showed 100% agreement with the commercial thermocycler. This simple design of the fPOC system demonstrates the potential to greatly enhance the practical applicability to develop a totally integrated point-of-care system for rapid on-site screening of the SARS-CoV-2 virus in the management of the pandemic.

3.
ACS Appl Mater Interfaces ; 10(12): 10362-10368, 2018 Mar 28.
Artigo em Inglês | MEDLINE | ID: mdl-29485851

RESUMO

Graphene nanomesh (GNM) is formed by patterning graphene with nanometer-scale pores separated by narrow necks. GNMs are of interest due to their potential semiconducting characteristics when quantum confinement in the necks leads to an energy gap opening. GNMs also have potential for use in phonon control and water filtration. Furthermore, physical phenomena, such as spin qubit, are predicted at pitches below 10 nm fabricated with precise structural control. Current GNM patterning techniques suffer from either large dimensions or a lack of structural control. This work establishes reliable GNM patterning with a sub-10 nm pitch and an < 4 nm pore diameter by the direct helium ion beam milling of suspended monolayer graphene. Due to the simplicity of the method, no postpatterning processing is required. Electrical transport measurements reveal an effective energy gap opening of up to ∼450 meV. The reported technique combines the highest resolution with structural control and opens a path toward GNM-based, room-temperature semiconducting applications.

4.
Sci Rep ; 7(1): 17083, 2017 12 06.
Artigo em Inglês | MEDLINE | ID: mdl-29213064

RESUMO

High-quality large-area graphene/h-BN vertical heterostructures are promising building blocks for many viable applications such as energy harvesting/conversion, electronics and optoelectronics. Here, we successfully grew high-quality large-area graphene/h-BN vertical heterostructures on Pt foils by one-batch low-pressure chemical vapor deposition (LPCVD). We obtained the high quality of about 200-µm-wide graphene/h-BN film having uniform layer thickness. Moreover, the obtained graphene/h-BN heterostructures exhibited field effect mobility of up to 7,200 cm2V-1s-1 at room temperature. These results suggest that such graphene/h-BN heterostructures on recyclable Pt foils grown by LPCVD are promising for high-performance graphene-based electronics.

5.
Nanoscale ; 8(9): 5059-66, 2016 Mar 07.
Artigo em Inglês | MEDLINE | ID: mdl-26865309

RESUMO

Novel nanogenerator structures composed of ZnO nanoflakes of less than 10 nm thickness were fabricated using a novel method involving a facile synthetic route and a rational design. The fabricated nanogenerators exhibited a short-circuit current density of 67 µA cm(-2), a peak-to-peak open-circuit voltage of 110 V, and an overall output power density exceeding 1.2 mW cm(-2), and to the best of our knowledge, these are the best values that have been reported so far in the literature on ZnO-based nanogenerators. We demonstrated that our nanogenerator design could instantaneously power 20 commercial green light-emitting diodes without any additional energy storage processes. Both the facile synthetic route for the ZnO nanoflakes and the straightforward device fabrication process present great scaling potential in order to power mobile and personal electronics that can be used in smart wearable systems, transparent and flexible devices, implantable telemetric energy receivers, electronic emergency equipment, and other self-powered nano/micro devices.

6.
Nanoscale ; 8(23): 12022-8, 2016 Jun 09.
Artigo em Inglês | MEDLINE | ID: mdl-27240692

RESUMO

We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

7.
Sci Rep ; 6: 33096, 2016 09 12.
Artigo em Inglês | MEDLINE | ID: mdl-27616038

RESUMO

We have explored a facile technique to transfer large area 2-Dimensional (2D) materials grown by chemical vapor deposition method onto various substrates by adding a water-soluble Polyvinyl Alcohol (PVA) layer between the polymethyl-methacrylate (PMMA) and the 2D material film. This technique not only allows the effective transfer to an arbitrary target substrate with a high degree of freedom, but also avoids PMMA etching thereby maintaining the high quality of the transferred 2D materials with minimum contamination. We applied this method to transfer various 2D materials grown on different rigid substrates of general interest, such as graphene on copper foil, h-BN on platinum and MoS2 on SiO2/Si. This facile transfer technique has great potential for future research towards the application of 2D materials in high performance optical, mechanical and electronic devices.

8.
Nanomicro Lett ; 7(1): 35-41, 2015.
Artigo em Inglês | MEDLINE | ID: mdl-30464954

RESUMO

A facile approach was demonstrated for fabricating high-performance nonvolatile memory devices based on ferroelectric-gate field effect transistors using a p-type Si nanowire coated with omega-shaped gate organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)). We overcame the interfacial layer problem by incorporating P(VDF-TrFE) as a ferroelectric gate using a low-temperature fabrication process. Our memory devices exhibited excellent memory characteristics with a low programming voltage of ±5 V, a large modulation in channel conductance between ON and OFF states exceeding 105, a long retention time greater than 3 × 104 s, and a high endurance of over 105 programming cycles while maintaining an I ON/I OFF ratio higher than 102.

9.
Nanoscale ; 7(27): 11660-6, 2015 Jul 21.
Artigo em Inglês | MEDLINE | ID: mdl-26098677

RESUMO

Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

10.
Nanoscale ; 6(10): 5479-83, 2014 May 21.
Artigo em Inglês | MEDLINE | ID: mdl-24727896

RESUMO

We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

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