Experimental demonstration of interferometric imaging using photonic integrated circuits.

This paper reports design, fabrication, and demonstration of a silica photonic integrated circuit (PIC) capable of conducting interferometric imaging with multiple baselines around λ = 1550 nm. The PIC consists of four sets of five waveguides (total of twenty waveguides), each leading to a three-band spectrometer (total of sixty waveguides), after which a tunable Mach-Zehnder interferometer (MZI) constructs interferograms from each pair of the waveguides. A total of thirty sets of interferograms (ten pairs of three spectral bands) is collected by the detector array at the output of the PIC. The optical path difference (OPD) of each interferometer baseline is kept to within 1 µm to maximize the visibility of the interference measurement. We constructed an experiment to utilize the two baselines for complex visibility measurement on a point source and a variable width slit. We used the point source to demonstrate near unity value of the PIC instrumental visibility, and used the variable slit to demonstrate visibility measurement for a simple extended object. The experimental result demonstrates the visibility of baseline 5 and 20 mm for a slit width of 0 to 500 µm in good agreement with theoretical predictions.

A scalable silicon photonic chip-scale optical switch for high performance computing systems.

This paper discusses the architecture and provides performance studies of a silicon photonic chip-scale optical switch for scalable interconnect network in high performance computing systems. The proposed switch exploits optical wavelength parallelism and wavelength routing characteristics of an Arrayed Waveguide Grating Router (AWGR) to allow contention resolution in the wavelength domain. Simulation results from a cycle-accurate network simulator indicate that, even with only two transmitter/receiver pairs per node, the switch exhibits lower end-to-end latency and higher throughput at high (>90%) input loads compared with electronic switches. On the device integration level, we propose to integrate all the components (ring modulators, photodetectors and AWGR) on a CMOS-compatible silicon photonic platform to ensure a compact, energy efficient and cost-effective device. We successfully demonstrate proof-of-concept routing functions on an 8 × 8 prototype fabricated using foundry services provided by OpSIS-IME.

Rapid and complete hitless defragmentation method using a coherent RX LO with fast wavelength tracking in elastic optical networks.

This paper demonstrates a rapid and full hitless defragmentation method in elastic optical networks exploiting a new technique for fast wavelength tracking in coherent receivers. This technique can be applied to a single-carrier connection or each of the subcarriers forming a super-channel. A proof-of-concept demonstration shows hitless defragmentation of a 10 Gb/s QPSK single-carrier connection from 1547.75 nm to 1550.1 nm in less than 1 µs. This was obtained using a small (0.625 kB) link-layer transmitter buffer without the need for any additional transponder. We also demonstrated that the proposed defragmentation technique is capable of hopping over an existing connection, i.e. 10 Gb/s OOK at 1548.5 nm, without causing any degradation of its real-time Bit Error Rate (BER) value. The proposed scheme gives advantages in terms of overall network blocking probability reduction up to a factor of 40.