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We design, fabricate, and demonstrate a low-loss and broadband optical interposer with high misalignment tolerance for large-scale integration of many chips using thermal compression flip-chip bonding. The optical interposer achieves flip-chip integration with photonic integrated circuit die containing evanescent couplers with inter-chip coupling loss of 0.54dB and ±3.53µm 3-dB misalignment tolerance. The loss measurement spectrum indicated wavelength-insensitive loss across O-band and C-band with negligible spectral dependence. Further, we demonstrate 1 to 100 wafer-scale equal power splitting using equal power splitters (EPS) and a path length matching design fabricated using a wafer-scale fabrication technique.
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This paper reports the design, fabrication, and experimental demonstration of a monolithic silicon photonic (SiPh) 32×32 Thin-CLOS arrayed waveguide grating router (AWGR) for scalable SiPh all-to-all interconnection fabrics. The 32×32 Thin-CLOS makes use of four 16-port silicon nitride AWGRs, which are compactly integrated and interconnected by a multi-layer waveguide routing method. The fabricated Thin-CLOS has 4 dB insertion loss, < -15 dB adjacent channel crosstalk, and < -20 dB non-adjacent channel crosstalk. System experiments operated on the 32×32 SiPh Thin-CLOS demonstrate error-free communication at 25 Gb/s.
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Photonic spiking neural networks (PSNNs) potentially offer exceptionally high throughput and energy efficiency compared to their electronic neuromorphic counterparts while maintaining their benefits in terms of event-driven computing capability. While state-of-the-art PSNN designs require a continuous laser pump, this paper presents a monolithic optoelectronic PSNN hardware design consisting of an MZI mesh incoherent network and event-driven laser spiking neurons. We designed, prototyped, and experimentally demonstrated this event-driven neuron inspired by the Izhikevich model incorporating both excitatory and inhibitory optical spiking inputs and producing optical spiking outputs accordingly. The optoelectronic neurons consist of two photodetectors for excitatory and inhibitory optical spiking inputs, electrical transistors' circuits providing spiking nonlinearity, and a laser for optical spiking outputs. Additional inclusion of capacitors and resistors complete the Izhikevich-inspired optoelectronic neurons, which receive excitatory and inhibitory optical spikes as inputs from other optoelectronic neurons. We developed a detailed optoelectronic neuron model in Verilog-A and simulated the circuit-level operation of various cases with excitatory input and inhibitory input signals. The experimental results closely resemble the simulated results and demonstrate how the excitatory inputs trigger the optical spiking outputs while the inhibitory inputs suppress the outputs. The nanoscale neuron designed in our monolithic PSNN utilizes quantum impedance conversion. It shows that estimated 21.09 fJ/spike input can trigger the output from on-chip nanolasers running at a maximum of 10 Gspike/second in the neural network. Utilizing the simulated neuron model, we conducted simulations on MNIST handwritten digits recognition using fully connected (FC) and convolutional neural networks (CNN). The simulation results show 90% accuracy on unsupervised learning and 97% accuracy on a supervised modified FC neural network. The benchmark shows our PSNN can achieve 50 TOP/J energy efficiency, which corresponds to 100 × throughputs and 1000 × energy-efficiency improvements compared to state-of-art electrical neuromorphic hardware such as Loihi and NeuroGrid.
Assuntos
Redes Neurais de Computação , Neurônios , Simulação por Computador , FótonsRESUMO
We discuss the design and demonstration of highly efficient 1.55 µm hybrid III-V/Silicon semiconductor optical amplifiers (SOA). The optimized III-V wafer stack consists of Al(0.10)In(0.71)Ga(0.18)As multiple quantum wells (MQW) and Al(0.48)In(0.52)As electron stop layers to realize SOAs with high wall-plug efficiency (WPE). We present various designs and experimentally determine WPE values for 2 mW and 0.1 mW input power amplification. The 400 µm long flared SOA achieved the highest WPE value of 12.1% for output power > 10mW and the 400 µm long straight SOA achieved the highest WPE value of 7.3% for output power < 10mW. These are the highest WPE values ever obtained for 1.55 µm SOAs.
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We investigate the athermal characteristics of silicon waveguides clad with TiO(2) designed for 1.3 µm wavelength operation. Using CMOS-compatible fabrication processes, we realize and experimentally demonstrate silicon photonic ring resonators with resonant wavelengths that vary by less than 6 pm/°C at 1.3 µm. The measured ring resonance wavelengths across the 20-50°C temperature range show nearly complete cancellation of the first-order thermo-optical effects and exhibit second-order thermo-optical effects expected from the combination of TiO(2) and Si.
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A variety of topological Hamiltonians have been demonstrated in photonic platforms, leading to fundamental discoveries and enhanced robustness in applications such as lasing, sensing, and quantum technologies. To date, each topological photonic platform implements a specific type of Hamiltonian with inexistent or limited reconfigurability. Here, we propose and demonstrate different topological models by using the same reprogrammable integrated photonics platform, consisting of a hexagonal mesh of silicon Mach-Zehnder interferometers with phase shifters. We specifically demonstrate a one-dimensional Su-Schrieffer-Heeger Hamiltonian supporting a localized topological edge mode and a higher-order topological insulator based on a two-dimensional breathing Kagome Hamiltonian with three corner states. These results highlight a nearly universal platform for topological models that may fast-track research progress toward applications of topological photonics and other coupled systems.
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With the increasing number of applications reliant on large neural network models, the pursuit of more suitable computing architectures is becoming increasingly relevant. Progress toward co-integrated silicon photonic and CMOS circuits provides new opportunities for computing architectures with high bandwidth optical networks and high-speed computing. In this paper, we discuss trends in neuromorphic computing architecture and outline an optoelectronic future for heterogeneous, dendritic neuromorphic computing.
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Group-IV materials for monolithic integration with silicon optoelectronic systems are being extensively studied. As a part of efforts, light emission from germanium has been pursued with the objective of evolving germanium into an efficient light source for optical communication systems. In this study, we demonstrate room-temperature electroluminescence from germanium in an Al(0.3)Ga(0.7)As/Ge heterojunction light-emitting diode without any complicated manipulation for alternating material properties of germanium. Electroluminescence peaks were observed near 1550 nm and the energy around this wavelength corresponds to that emitted from direct recombination at the Γ-valley of germanium.
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A stable optical frequency comb with 20-GHz spacing is shaped by a compact integrated silica arrayed waveguide grating (AWG) pair to produce optical waveforms with unprecedented fidelity. Complete characterization of both the intensity and phase of the crafted optical fields is accomplished with cross-correlation frequency resolved optical gating (XFROG) which has been optimized for periodic waveforms with resolvable modes. A new method is proposed to quantify, in a single number, the quality of the match in both the amplitude and phase between the measured optical waveform and the target waveform.
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The continuing trend of exponential growth in data communications and processing are driving the need for large-scale heterogeneous integration. Similar to the trend we have observed in electronic integrated circuit development, we are witnessing a growing trend in 3D photonic integrated circuits (PICs) development in addition to that in 2D PICs. There are two main methods for fabricating 3D PICs. The first method, which utilizes ultrafast laser inscription (ULI), offers freeform shaping of waveguides in arbitrary contours and formations. The second method, which utilizes multilayer stacking and coupling of planar PICs, exploits relatively mature 2D PIC fabrication processes applied to each layer sequentially. Both the fabrication methods for 3D PICs have advantages and disadvantages such that certain applications may favor one method over the other. However, a joining of 2D PICs with 3D PICs can help develop integrated microsystems with new functionalities such as non-mechanical beam steering, space-division multiplexing (SDM), programmable arbitrary beam shaping, and photonic signal processing. We discuss examples of 3D PICs and 2D/3D integrated PICs in two applications: SDM via orbital-angular-momentum (OAM) multiplexing/demultiplexing and optical beam steering using optical phased arrays. Although a 2D PIC by itself can function as an OAM multiplexer or demultiplexer, it has limitations in supporting both polarizations. Alternatively, a 3D PIC fabricated by ULI can easily support both polarizations with low propagation loss. A combination of a 3D PIC and a 2D PIC designed and fabricated for OAM applications has successfully multiplexed and demultiplexed 15 OAM states to demonstrate polarization-diversified SDM coherent optical communications using multiple OAM states. Coherent excitation of multi-ring OAM states can allow highly scalable SDM utilizing Laguerre-Gaussian modes or linearly polarized (LP) modes. The preliminary fabrication of multi-ring OAM multiplexers and demultiplexers using the multilayer 3D PIC method and the ULI 3D PIC method has also been pursued. Large-scale (for example, 16×16 optical phased array) 3D PICs fabricated with the ULI technique have been demonstrated. Through these examples, we show that heterogeneous 2D/3D photonic integration retains the advantages of 2D PICs and 3D waveguides, which can potentially benefit many other applications.