Giant Enhancement of Hole Mobility for 4H-Silicon Carbide through Suppressing Interband Electron-Phonon Scattering.

4H-silicon carbide (4H-SiC) possesses a high Baliga figure of merit, making it a promising material for power electronics. However, its applications are limited by low hole mobility. Herein, we found that the hole mobility of 4H-SiC is mainly limited by the strong interband electron-phonon scattering using mode-level first-principles calculations. Our research indicates that applying compressive strain can reverse the sign of crystal-field splitting and change the ordering of electron bands close to the valence band maximum. Therefore, the interband electron-phonon scattering is severely suppressed and the electron group velocity is significantly increased. The out-of-plane hole mobility of 4H-SiC can be greatly enhanced by ∼200% with 2% uniaxial compressive strain applied. This work provides new insights into the electron transport mechanisms in semiconductors and suggests a strategy to improve hole mobility that could be applied to other semiconductors with hexagonal crystalline geometries.

Selective Generation of V2 Silicon Vacancy Centers in 4H-Silicon Carbide.

The deterministic generation of individual color centers with defined orientations or types in solid-state systems is paramount for advancements in quantum technologies. Silicon vacancies in 4H-silicon carbide (4H-SiC) can be formed in V1 and V2 types. However, silicon vacancies are typically generated randomly between V1 and V2 types with similar probabilities. Here, we show that the preferred V2 centers can be selectively generated by focused ion beam (FIB) implantation on the m-plane in 4H-SiC. When implantation is on the m-plane (a-plane), the generation probability ratio between V1 and V2 centers increase exponentially (remains constant) with decreasing FIB fluences. With a fluence of 10 ions/spot, the probability to generate V2 centers is seven times higher than V1 centers. Our results represent a critical step toward the deterministic creation of specific defect types.

Reversal in Output Current Direction of 4H-SiC/Cu Tribovoltaic Nanogenerator as Controlled by Relative Humidity.

Tribovoltaic nanogenerators (TVNG) represent a fantastic opportunity for developing low-frequency energy harvesting and self-powered sensing, by exploiting their real-time direct-current (DC) output. Here, a thorough study of the effect of relative humidity (RH) on a TVNG consisting of 4H-SiC (n-type) and metallic copper foil (SM-TVNG) is presented. The SM-TVNG shows a remarkable sensitivity to RH and an abnormal RH dependence. When RH increases from ambient humidity up to 80%, an increasing electrical output is observed. However, when RH rises from 80% to 98%, the signal output not only decreases, but its direction reverses as it crosses 90% RH. This behavior differs greatly from that of a Si-based TVNG, whose output constantly increases with RH. The behavior of the SM-TVNG might result from the competition between the built-in electric field induced by metal-semiconductor contact and a strong triboelectric electric field induced by solid-liquid triboelectrification under high RH. The authors also demonstrated that both SM-TVNG and Si-based TVNG can work effectively as-is even fully submerged in deionized water. This mechanism can affect other devices and be applied to design self-powered sensors working under high RH or underwater.

High-Sensitivity Photoelectrochemical Ultraviolet Photodetector with Stable pH-Universal Adaptability Based on Whole Single-Crystal Integrated Self-Supporting 4H-SiC Nanoarrays.

Emerging photoelectrochemical (PEC) photodetectors (PDs) have notable advantages over conventional PDs and have attracted extensive attention. However, harsh liquid environments, such as those with high corrosivity and attenuation, substantially restrict their widespread application. Moreover, most PEC PDs are constructed by assembling numerous nanostructures on current collector substrates, which inevitably contain abundant interfaces and defects, thus greatly weakening the properties of PDs. To address these challenges, a high-performance pH-universal PEC ultraviolet (UV) PD based on a whole single-crystal integrated self-supporting 4H-SiC nanopore array photoelectrode is constructed, which is fabricated using a two-step anodic oxidation approach. The PD exhibits excellent photodetection behavior, with high responsivity (218.77 mA W-1), detectivity (6.64 × 1013 Jones), external quantum efficiency (72.47%), and rapid rise/decay times (17/48 ms) under 375 nm light illumination with a low intensity of 0.15 mW cm-2 and a bias voltage of 0.6 V, which is fall in the state-of-the-art of the wide-bandgap semiconductor-based PDs reported thus far. Furthermore, the SiC PEC PD exhibits excellent photoresponse and long-term operational stability in pH-universal liquid environments. The improved photodetection performance of the SiC PEC PD is primarily attributed to the synergistic effect of the nanopore array structure, integrated self-supporting configuration, and single-crystal structure of the whole photoelectrode.

Effects of gamma-ray irradiation on material and electrical properties of AlN gate dielectric on 4H-SiC.

This article investigates the radiation effects on as-deposited and annealed AlN films on 4H-SiC substrates under gamma-rays. The AlN films are prepared using plasma-enhanced-atomic-layer-deposition on an n-type 4H-SiC substrate. The AlN/4H-SiC MIS structure is subjected to gamma-ray irradiation with total doses of 0, 300, and 600 krad(Si). Physical, chemical, and electrical methods were employed to study the variations in surface morphology, charge transport, and interfacial trapping characteristics induced by irradiation. After 300 krad(Si) irradiation, the as-deposited and annealed samples exhibit their highest root mean square values of 0.917 nm and 1.190 nm, respectively, which is attributed to N vacancy defects induced by irradiation. Under irradiation, the flatband voltage (Vfb) of the as-deposited sample shifts from 2.24 to 0.78 V, while the annealed sample shifts from 1.18 to 2.16 V. X-ray photoelectron spectrum analysis reveals the decomposition of O-related defects in the as-deposited AlN and the formation of Al(NOx)ycompounds in the annealed sample. Furthermore, the space-charge-limits-conduction (SCLC) in the as-deposited sample is enhanced after radiation, while the barrier height of the annealed sample decreases from 1.12 to 0.84 eV, accompanied by the occurrence of the SCLC. The physical mechanism of the degradation of electrical performance in irradiated devices is the introduction of defects like N vacancies and O-related defects like Al(NOx)y. These findings provide valuable insights for SiC power devices in space applications.

On-Chip Circularly Polarized Circular Loop Antennas Utilizing 4H-SiC and GaAs Substrates in the Q/V Band.

This paper presents a comprehensive assessment of the performance of on-chip circularly polarized (CP) circular loop antennas that have been designed and fabricated to operate in the Q/V frequency band. The proposed antenna design incorporates two concentric loops, with the outer loop as the active element and the inner loop enhancing the CP bandwidth. The study utilizes gallium arsenide (GaAs) and silicon carbide (4H-SiC) semiconductor wafer substrates. The measured results highlight the successful achievement of impedance matching at 40 GHz and 44 GHz for the 4H-SiC and GaAs substrates, respectively. Furthermore, both cases yield an axial ratio (AR) of less than 3 dB, with variations in bandwidths and frequency bands contingent upon the dielectric constant of the respective substrate material. Moreover, the outcomes confirm that utilizing 4H-SiC substrates results in a significantly higher radiation efficiency of 95%, owing to lower substrate losses. In pursuit of these findings, a 4-element circularly polarized loop array antenna has been fabricated for operation at 40 GHz, employing a 4H-SiC wafer as a low-loss substrate. The results underscore the antenna's remarkable performance, exemplified by a broadside gain of approximately 9.7 dBic and a total efficiency of circa 92%. A close agreement has been achieved between simulated and measured results.

4H-SiC surface morphology after Al ion implantation and annealing with C-cap.

The root mean square (rms) surface roughness extracted from atomic force microscopy is widely employed to complement the characterisation of ion implantation processes in 4H-SiC. It is known that the protection of a carbon film eliminates or mitigates roughening of the SiC surface during postimplantation annealing. This study, based on a rich original data collection of Al+ ion implanted 4H-SiC samples, allows for a quantitative description of the surface morphology as a function of the annealing temperature and time and of the Al implanted concentration. With increasing thermal budget, the evolution from flat, to blurred with ripples, granular, and finally jagged surface, results in a monotonous increase in the root mean square roughness. Additional information is given by the trends of the roughness exponent and of the correlation length, extracted from the height-height correlation function, which account for the surface evolution below 1700°C and for the effect of the Al implanted concentration on the ripple size, respectively. A combination of low roughness parameter and high correlation length identify the transition from ripples to jagged morphology. LAY DESCRIPTION: Selective area doping is a key step in the fabrication of hexagonal Silicon Carbide (4H-SiC) power electronic devices. It is achieved by ion implantation followed by a high temperature postimplantation annealing to restore the lattice and electrically activate the dopants. Aluminium, the preferred p-type dopant, is electrically activated at temperature ranging between 1500°C and 2000°C. The time required to complete the activation process is longer the lower the annealing temperature, spanning between some minutes and hundreds of hours. During annealing, 4H-SiC wafers are encapsulated by a temperature-resistant carbon layer (C-cap) in order to avoid step bunching and reduce surface roughening. Nevertheless, surface modifications can occur at high temperature. For this reason, the characterisations of 4H-SiC doping processes report not only the electrical activation of the dopants, but also the root mean square surface roughness obtained at the end of the process. However, rms values can be scattered because technological parameters such as the heating system and the way to deposit and remove the C-cap can affect the final result as well as the process parameters. Furthermore, the C-cap resistance to long annealing has been proven only by electrical measurements, but the surface morphology has never been observed. This work presents a quantitative characterisation of the surface morphology of Al implanted 4H-SiC as a function of the annealing temperature, time and of the Al implanted concentration, independent of the heating system and of the C-cap technology. The produced sample collection allowed to correlate characteristic surface features with the corresponding quantities extracted from image analysis that can be more sensitive to process parameters than the sole rms. These findings can be used to enrich process optimisation tools.

The Fabrication and Characterization of Ni/4H-SiC Schottky Diode Radiation Detectors with a Sensitive Area of up to 4 cm².

Silicon carbide (SiC) detectors of an Ni/4H-SiC Schottky diode structure and with sensitive areas of 1-4 cm² were fabricated using high-quality lightly doped epitaxial 4H-SiC material, and were tested in the detection of alpha particles and pulsed X-rays/UV-light. A linear energy response to alpha particles ranging from 5.157 to 5.805 MeV was obtained. The detectors were proved to have a low dark current, a good energy resolution, and a high neutron/gamma discrimination for pulsed radiation, showing the advantages in charged particle detection and neutron detection in high-temperature and high-radiation environments.

Influence of Carbon Source on the Buffer Layer for 4H-SiC Homoepitaxial Growth.

In this study, we systematically explore the impact of C/Si ratio, pre-carbonization time, H2 etching time, and growth pressure on the buffer layer and subsequent epitaxial layer of 6-inch 4H-SiC wafers. Our findings indicate that the buffer layer's C/Si ratio and growth pressure significantly influence the overall quality of the epitaxial wafer. Specifically, an optimal C/Si ratio of 0.5 and a growth pressure of 70 Torr yield higher-quality epitaxial layers. Additionally, the pre-carbonization time and H2 etching time primarily affect the uniformity and surface quality of the epitaxial wafer, with a pre-carbonization time of 3 s and an H2 etching time of 3 min found to enhance the surface quality of the epitaxial layer.

Influence of Growth Process on Suppression of Surface Morphological Defects in 4H-SiC Homoepitaxial Layers.

To address surface morphological defects that have a destructive effect on the epitaxial wafer from the aspect of 4H-SiC epitaxial growth, this study thoroughly examined many key factors that affect the density of defects in 4H-SiC epitaxial wafer, including the ratio of carbon to silicon, growth time, application of a buffer layer, hydrogen etching and other process parameters. Through systematic experimental verification and data analysis, it was verified that when the carbon-silicon ratio was accurately controlled at 0.72, the density of defects in the epitaxial wafer was the lowest, and its surface flatness showed the best state. In addition, it was found that the growth of the buffer layer under specific conditions could effectively reduce defects, especially surface morphology defects. This provides a new idea and method for improving the surface quality of epitaxial wafers. At the same time, we also studied the influence of hydrogen etching on the quality of epitaxial wafers. The experimental results show that proper hydrogen etching can optimize surface quality, but excessive etching may lead to the exposure of substrate defects. Therefore, it is necessary to carefully control the conditions of hydrogen etching in practical applications to avoid adverse effects. These findings have important guiding significance for optimizing the quality of epitaxial wafers.

Modelling Gd-diamond and Gd-SiC neutron detectors.

A custom Monte Carlo (MC) computer model was developed to simulate thermal neutron absorption in, and subsequent photon and electron emission from, natural Gd with a view to using the material as a neutron conversion layer for neutron detectors. The MC code also modelled photon and electron detection with two dissimilar detectors: a thick (500 µm) single crystal diamond detector; and a thin (5.15 µm) commercial off the shelf (COTS) 4H-SiC photodiode detector. The detectors' quantum detection efficiencies (QE) for hard X-rays and γ-rays were relatively low in comparison to their QE for electrons, thus making it possible to collect electron spectra from the Gd layer neutron conversion products which were not overwhelmed by photon emissions from the Gd. The MC code was utilised to determine the optimal thickness of Gd for the efficient detection of a thermal neutron flux. These radiation hard and spectroscopic detectors paired with natural Gd could find utility as robust and compact thermal neutron detectors for nuclear science and engineering, space science, and other applications.

4H-SiC MOSFET Threshold Voltage Instability Evaluated via Pulsed High-Temperature Reverse Bias and Negative Gate Bias Stresses.

This paper presents a reliability study of a conventional 650 V SiC planar MOSFET subjected to pulsed HTRB (High-Temperature Reverse Bias) stress and negative HTGB (High-Temperature Gate Bias) stress defined by a TCAD static simulation showing the electric field distribution across the SiC/SiO2 interface. The instability of several electrical parameters was monitored and their drift analyses were investigated. Moreover, the shift of the onset of the Fowler-Nordheim gate injection current under stress conditions provided a reliable method to quantify the trapped charge inside the gate oxide bulk, and it allowed us to determine the real stress conditions. Moreover, it has been demonstrated from the cross-correlation, the TCAD simulation, and the experimental ΔVth and ΔVFN variation that HTGB stress is more severe compared to HTRB. In fact, HTGB showed a 15% variation in both ΔVth and ΔVFN, while HTRB showed only a 4% variation in both ΔVth and ΔVFN. The physical explanation was attributed to the accelerated degradation of the gate insulator in proximity to the source region under HTGB configuration.

Research on the Influence of Carbon Sources and Buffer Layers on the Homogeneous Epitaxial Growth of 4H-SiC.

In this study, a 4H-SiC homoepitaxial layer was grown on a 150 mm 4° off-axis substrate using a horizontal hot wall chemical vapor deposition reactor. Comparing C3H8 and C2H4 as C sources, the sample grown with C2H4 exhibited a slower growth rate and lower doping concentration, but superior uniformity and surface roughness compared to the C3H8-grown sample. Hence, C2H4 is deemed more suitable for commercial epitaxial wafer growth. Increasing growth pressure led to decreased growth rate, worsened thickness uniformity, reduced doping concentration, deteriorated uniformity, and initially improved and then worsened surface roughness. Optimal growth quality was observed at a lower growth pressure of 40 Torr. Furthermore, the impact of buffer layer growth on epitaxial quality varied significantly based on different C/Si ratios, emphasizing the importance of selecting the appropriate conditions for subsequent device manufacturing.

Characteristics of the Discoloration Switching Phenomenon of 4H-SiC Single Crystals Grown by PVT Method Using ToF-SIMS and Micro-Raman Analysis.

The discoloration switching appearing in the initial and final growth stages of 4H-silicon carbide (4H-SiC) single crystals grown using the physical vapor transport (PVT) technique was investigated. This phenomenon was studied, investigating the correlation with linear-type micro-pipe defects on the surface of 4H-SiC single crystals. Based on the experimental results obtained using time-of-flight secondary ion mass spectrometry (ToF-SIMS) and micro-Raman analysis, it was deduced that the orientation of the 4H-SiC c-axis causes an axial change that correlates with low levels of carbon. In addition, it was confirmed that the incorporation of additional elements and the concentrations of these doped impurity elements were the main causes of discoloration and changes in growth orientation. Overall, this work provides guidelines for evaluating the discoloration switching in 4H-SiC single crystals and contributes to a greater understanding of this phenomenon.

Robust Thermal Transport across the Surface-Active Bonding SiC-on-SiC.

Surface-active bonding (SAB) is a promising technique for semiconductors directly bonding. However, the interlayer of the bonding interface and the reduced layer thickness may affect thermal transport. In this study, the temperature-dependent cross-plane thermal conductivity of 4H-SiC thin films and the effective thermal boundary resistance (TBReff) of the bonding SiC-on-SiC are measured by the multiple-probe wavelength nanosecond transient thermoreflectance (MW-TTR). The measured temperature-dependent cross-plane thermal conductivity of the 4H-SiC thin film exhibits good quantitative agreement with calculation by density functional theory (DFT) including higher-order four-phonon (4ph) scattering, especially at high temperatures (>400 K). The theoretical calculations indicate the non-negligible importance of 4ph scattering in 4H-SiC high-temperature applications, due to the significantly increasing 4ph scattering rate at increasing temperature and strong temperature dependence of 4ph scattering. The measured nonzero but small TBReff (2.33 + 0.43/-1.15 m2 K/GW) at the SiC-SiC interface is analyzed with molecular dynamics (MD) simulation, indicating that a strong bonding interface with an extremely thin interlayer is formed by the SAB process. Two-dimensional finite element simulations of the experimental equivalent structures are further investigated, and the significant effects (at least 19 °C) of TBReff on the maximum temperature (Tmax) are confirmed. This study provides insight into the fundamental phonon transport and interface thermal transport mechanism in SAB SiC-on-SiC and paves the way for improved 4H-SiC efficient device manufacturing and thermal management.

High-Performance Ultraviolet Photodetector Based on Single-Crystal Integrated Self-Supporting 4H-SiC Nanohole Arrays.

Currently, the photodetectors (PDs) assembled by vertically aligned nanostructured arrays have attracted intensive interest owing to their unique virtues of low light reflectivity and rapid charge transport. However, in terms of the inherent limitations caused by numerous interfaces often existed within the assembled arrays, the photogenerated carriers cannot be effectively separated, thus weakening the performance of target PDs. Aiming at resolving this critical point, a high-performance ultraviolet (UV) PD with a single-crystal integrated self-supporting 4H-SiC nanohole arrays is constructed, which are prepared via the anode oxidation approach. As a result, the PD delivers an excellent performance with a high switching ratio (∼250), remarkable detectivity (6 × 1010 Jones), fast response (0.5 s/0.88 s), and excellent stability under 375 nm light illumination with a bias voltage of 5 V. Moreover, it has a high responsivity (824 mA/W), superior to those of most reported ones based on 4H-SiC. The overall high performance of the PDs could be mainly attributed to the synergistic effect of the SiC nanohole arrays' geometry, a whole single-crystal integrated self-supporting film without interfaces, established reliable Schottky contact, and incorporated N dopants.

A Novel Super-Junction DT-MOS with Floating p Regions to Improve Short-Circuit Ruggedness.

A novel super-junction (SJ) double-trench metal oxide semiconductor field effect transistor (DT-MOS) is proposed and studied using Synopsys Sentaurus TCAD in this article. The simulation results show that the proposed MOSFET has good static performance and a longer short-circuit withstand time (tsc). The super-junction structure enables the device to possess an excellent compromise of breakdown voltage (BV) and specific on-resistance (Ron,sp). Under short-circuit conditions, the depletion of p-pillar, p-shield, and floating p regions can effectively reduce saturation current and improve short-circuit capability. The proposed device has minimum gate-drain charge (Qgd) and gate-drain capacitance (Cgd) compared with other devices. Moreover, the formation of floating p regions will not lead to an increase in process complexity. Therefore, the proposed MOSFET can maintain good dynamic and static performance and short-circuit ability together without increasing the difficulty of the process.

Investigation of Reducing Interface State Density in 4H-SiC by Increasing Oxidation Rate.

Detailed investigations of the pre-oxidation phosphorus implantation process are required to increase the oxidation rate in 4H-SiC metal-oxide-semiconductor (MOS) capacitors. This study focuses on the SiO2/SiC interface characteristics of pre-oxidation using phosphorus implantation methods. The inversion channel mobility of a metal-oxide-semiconductor field effect transistor (MOSFET) was decreased via a high interface state density and the coulomb-scattering mechanisms of the carriers. High-resolution transmission electron microscopy (HRTEM) and scanning transmission electron microscopy (STEM) were used to evaluate the SiO2/SiC interface's morphology. According to the energy-dispersive X-ray spectrometry (EDS) results, it was found that phosphorus implantation reduced the accumulation of carbon at the SiO2/SiC interface. Moreover, phosphorus distributed on the SiO2/SiC interface exhibited a Gaussian profile, and the nitrogen concentration at the SiO2/SiC interface may be correlated with the content of phosphorus. This research presents a new approach for increasing the oxidation rate of SiC and reducing the interface state density.

Experimental Study on Shear Rheological Polishing of Si Surface of 4H-SiC Wafer.

In this study, shear rheological polishing was used to polish the Si surface of six-inch 4H-SiC wafers to improve polishing efficiency. The surface roughness of the Si surface was the main evaluation index, and the material removal rate was the secondary evaluation index. An experiment was designed using the Taguchi method to analyze the effects of four critical parameters (abrasive particle size, abrasive particle concentration, polishing speed, and polishing pressure) on the Si surface polishing of SiC wafers. By evaluating the experimental results for the signal-to-noise ratio, the weight of each factor was calculated using the analysis of variance method. The optimal combination of the process parameters was obtained. Below are the weightings for the influence of each process on the polishing result. A higher value for the percentage means that the process has a greater influence on the polishing result. The wear particle size (85.98%) had the most significant influence on the surface roughness, followed by the polishing pressure (9.45%) and abrasive concentration (3.25%). The polishing speed had the least significant effect on the surface roughness (1.32%). Polishing was conducted under optimized process conditions of a 1.5 µm abrasive particle size, 3% abrasive particle concentration, 80 r/min polishing speed, and 20 kg polishing pressure. After polishing for 60 min, the surface roughness, Ra, decreased from 114.8 to 0.9 nm, with a change rate of 99.2%. After further polishing for 60 min, an ultrasmooth surface with an Ra of 0.5 nm and MRR of 20.83 nm/min was obtained. Machining the Si surface of 4H-SiC wafers under optimal polishing conditions can effectively remove scratches on the Si surface of 4H-SiC wafers and improve the surface quality.

Fabrication and Polishing Performance of Diamond Self-Sharpening Gel Polishing Disk.

A diamond gel polishing disk with self-sharpening ability is proposed to solve the problem of glazing phenomenon in the gel polishing disks. Aluminum nitride (AlN) powder with silica sol film coating (A/S powder) is added to the polishing disk, and a specific solution is used to dissolve the A/S powder during polishing, forming a pore structure on the polishing disk. To realize the self-sharpening process, the dissolution property of the A/S powder is analyzed. The effect of A/S powder content on the friction and wear performance and the polishing performance of 4H-SiC wafers are investigated. Results showed that the friction coefficient of the polishing disk with 9 wt% A/S powder content is the most stable. The surface roughness Ra of 2.25 nm can be achieved, and there is no obvious glazing phenomenon on the polishing disk after polishing. The surface roughness of the 4H-SiC wafer is reduced by 38.8% compared with that of the polishing disk with no A/S powder addition after rough polishing, and the 4H-SiC wafer then obtained a damage-free surface with a Ra less than 0.4 nm after fine polishing by chemical mechanical polishing (CMP).