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High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures.
Liu, Yuan; Sheng, Jiming; Wu, Hao; He, Qiyuan; Cheng, Hung-Chieh; Shakir, Muhammad Imran; Huang, Yu; Duan, Xiangfeng.
Afiliação
  • Liu Y; Department of Materials Science and Engineering, University of California, Los Angeles, CA, 90095, USA.
  • Sheng J; Department of Materials Science and Engineering, University of California, Los Angeles, CA, 90095, USA.
  • Wu H; Department of Materials Science and Engineering, University of California, Los Angeles, CA, 90095, USA.
  • He Q; Department of Chemistry and Biochemistry, University of California, Los Angeles, CA, 90095, USA.
  • Cheng HC; Department of Materials Science and Engineering, University of California, Los Angeles, CA, 90095, USA.
  • Shakir MI; Sustainable Energy Technologies Center, College of Engineering, King Saud University, Riyadh, 11421, Kingdom of Saudi Arabia.
  • Huang Y; Department of Materials Science and Engineering, University of California, Los Angeles, CA, 90095, USA.
  • Duan X; Department of Chemistry and Biochemistry, University of California, Los Angeles, CA, 90095, USA.
Adv Mater ; 28(21): 4120-5, 2016 Jun.
Article em En | MEDLINE | ID: mdl-27038143
Scalable fabrication of vertical-tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm(-2) . This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene-silicon heterostructures.
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Texto completo: 1 Base de dados: MEDLINE Idioma: En Ano de publicação: 2016 Tipo de documento: Article
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Texto completo: 1 Base de dados: MEDLINE Idioma: En Ano de publicação: 2016 Tipo de documento: Article