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Fabrication of p-type 2D single-crystalline transistor arrays with Fermi-level-tuned van der Waals semimetal electrodes.
Song, Seunguk; Yoon, Aram; Jang, Sora; Lynch, Jason; Yang, Jihoon; Han, Juwon; Choe, Myeonggi; Jin, Young Ho; Chen, Cindy Yueli; Cheon, Yeryun; Kwak, Jinsung; Jeong, Changwook; Cheong, Hyeonsik; Jariwala, Deep; Lee, Zonghoon; Kwon, Soon-Yong.
Afiliação
  • Song S; Department of Materials Science and Engineering & Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, 44919, Republic of Korea.
  • Yoon A; Department of Electrical and Systems Engineering, University of Pennsylvania, Philadelphia, PA, 19104, US.
  • Jang S; Department of Materials Science and Engineering & Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, 44919, Republic of Korea.
  • Lynch J; Center for Multidimensional Carbon Materials (CMCM), Institute for Basic Science (IBS), Ulsan, 44919, Republic of Korea.
  • Yang J; Department of Materials Science and Engineering & Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, 44919, Republic of Korea.
  • Han J; Department of Electrical and Systems Engineering, University of Pennsylvania, Philadelphia, PA, 19104, US.
  • Choe M; Department of Materials Science and Engineering & Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, 44919, Republic of Korea.
  • Jin YH; Department of Materials Science and Engineering & Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, 44919, Republic of Korea.
  • Chen CY; Department of Materials Science and Engineering & Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, 44919, Republic of Korea.
  • Cheon Y; Center for Multidimensional Carbon Materials (CMCM), Institute for Basic Science (IBS), Ulsan, 44919, Republic of Korea.
  • Kwak J; Department of Materials Science and Engineering & Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, 44919, Republic of Korea.
  • Jeong C; Department of Chemistry, University of Pennsylvania, Philadelphia, PA, 19104, US.
  • Cheong H; Department of Physics, Sogang University, Seoul, 04107, Republic of Korea.
  • Jariwala D; Department of Materials Science and Engineering & Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, 44919, Republic of Korea.
  • Lee Z; Department of Physics, Changwon National University, Changwon, 51140, Republic of Korea.
  • Kwon SY; Department of Materials Science and Engineering & Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, 44919, Republic of Korea.
Nat Commun ; 14(1): 4747, 2023 Aug 07.
Article em En | MEDLINE | ID: mdl-37550303
ABSTRACT
High-performance p-type two-dimensional (2D) transistors are fundamental for 2D nanoelectronics. However, the lack of a reliable method for creating high-quality, large-scale p-type 2D semiconductors and a suitable metallization process represents important challenges that need to be addressed for future developments of the field. Here, we report the fabrication of scalable p-type 2D single-crystalline 2H-MoTe2 transistor arrays with Fermi-level-tuned 1T'-phase semimetal contact electrodes. By transforming polycrystalline 1T'-MoTe2 to 2H polymorph via abnormal grain growth, we fabricated 4-inch 2H-MoTe2 wafers with ultra-large single-crystalline domains and spatially-controlled single-crystalline arrays at a low temperature (~500 °C). Furthermore, we demonstrate on-chip transistors by lithographic patterning and layer-by-layer integration of 1T' semimetals and 2H semiconductors. Work function modulation of 1T'-MoTe2 electrodes was achieved by depositing 3D metal (Au) pads, resulting in minimal contact resistance (~0.7 kΩ·µm) and near-zero Schottky barrier height (~14 meV) of the junction interface, and leading to high on-state current (~7.8 µA/µm) and on/off current ratio (~105) in the 2H-MoTe2 transistors.

Texto completo: 1 Base de dados: MEDLINE Idioma: En Ano de publicação: 2023 Tipo de documento: Article

Texto completo: 1 Base de dados: MEDLINE Idioma: En Ano de publicação: 2023 Tipo de documento: Article