Nanotube substituted source/drain regions for carbon nanotube transistors for VLSI circuits.

Aggressive scaling of silicon technology over the years has pushed CMOS devices to their fundamental limits. Pioneering works on carbon nanotube during the last decade possessing exceptional electrical properties have provided an intriguing solution for high performance integrated circuits. So far, at best, carbon nanotubes have been considered only for the channel, with metal electrodes being used for source/drain. Here, alternative schemes of 'All-Nanotube' transistor are presented where even the transistor components are derived from carbon nanotubes which hold the promise for smaller, faster, denser and more power efficient electronics.

3ω correction method for eliminating resistance measurement error due to Joule heating.

Electrical four-terminal sensing at (sub-)micrometer scales enables the characterization of key electromagnetic properties within the semiconductor industry, including materials' resistivity, Hall mobility/carrier density, and magnetoresistance. However, as devices' critical dimensions continue to shrink, significant over/underestimation of properties due to a by-product Joule heating of the probed volume becomes increasingly common. Here, we demonstrate how self-heating effects can be quantified and compensated for via 3ω signals to yield zero-current transfer resistance. Under further assumptions, these signals can be used to characterize selected thermal properties of the probed volume, such as the temperature coefficient of resistance and/or the Seebeck coefficient.

Atomic Layer Deposition of Ruthenium with TiN Interface for Sub-10 nm Advanced Interconnects beyond Copper.

Atomic layer deposition of ruthenium is studied as a barrierless metallization solution for future sub-10 nm interconnect technology nodes. We demonstrate the void-free filling in sub-10 nm wide single damascene lines using an ALD process in combination with 2.5 Å of ALD TiN interface and postdeposition annealing. At such small dimensions, the ruthenium effective resistance depends less on the scaling than that of Cu/barrier systems. Ruthenium effective resistance potentially crosses the Cu curve at 14 and 10 nm according to the semiempirical interconnect resistance model for advanced technology nodes. These extremely scaled ruthenium lines show excellent electromigration behavior. Time-dependent dielectric breakdown measurements reveal negligible ruthenium ion drift into low-κ dielectrics up to 200 °C, demonstrating that ruthenium can be used as a barrierless metallization in interconnects. These results indicate that ruthenium is highly promising as a replacement to Cu as the metallization solution for future technology nodes.