Broadband and Efficient Envelope Amplifier for Envelope Elimination and Restoration/Envelope Tracking Higher-Efficiency Power Amplifiers.

Increasing the efficiency of transmitters, as the largest consumers of energy, is relevant for any wireless communication devices. For higher efficiency, a number of methods are used, including envelope tracking and envelope elimination and restoration. Increasing the bandwidth of used frequencies requires expanding envelope modulators bandwidth up to 250-500 MHz or more. The possibility of using amplifiers with input signal quantization (AISQ), as an alternative to the most common hybrid envelope tracking modulators, is considered. An approach has been developed for optimizing AISQ characteristics according to the criterion of minimum loss when amplifying modern telecommunication signals with Rayleigh envelope distribution. The optimal quantization levels are determined and the energy characteristics of AISQ are calculated. AISQ loss power is shown to decrease by 1.66 times with two-level quantization, by 2.4 times with three-level quantization, and by a factor of 3.0-3.7 for four-five quantization levels compared to a class B amplifier. With these parameters, AISQ becomes competitive with respect to hybrid envelope tracking modulators but does not have electromagnetic interference from the pulse width modulation (PWM) path.

A Wide-Bandwidth PVT-Reconfigurable CMOS Power Amplifier with an Integrated Tunable-Output Impedance Matching Network.

This paper proposes a wideband CMOS power amplifier (PA) with integrated digitally assisted wideband pre-distorter (DAWPD) and a transformer-integrated tunable-output impedance matching network. As a continuation of our previous research, which focused only on linearization tuning for wideband and PVT, this work emphasized improving the maximum output power, gain and PAE across the PVT variations while maintaining the linearity for a wide frequency bandwidth of 1 GHz. The DAWPD is employed at the driver stage to realize a pre-distorting characteristic for wideband linearization. The addition of the tunable-output impedance matching technique in this work provides stable output power, PAE and gain across the PVT variations, through which it improves the design's robustness, reliability and production yield. Fabricated in CMOS 130 nm with an 8-metal-layer process, the DAWPD-PA with tunable-output impedance matching can achieve an operating frequency bandwidth of 1 GHz from 1.7 to 2.7 GHz. The DAWPD-PA attained a maximum output power of 27 to 28 dBm with a peak PAE of 38.8 to 41.3%. The power gain achieved was 26.9 to 29.7 dB across the targeted frequencies. In addition, when measured with a 20 MHz LTE modulated signal, the DAWPD-PA achieved a linear output power and PAE of 24.0 to 25.1 dBm and 34.5 to 38.8% across the frequency, respectively. On top of that, in this study, the DAWPD-PA is proven to be resilient to process-voltage-temperature (PVT) variations, where it achieves stable performances via the utilization of the proposed tuning mechanisms, mainly contributed by the proposed transformer-integrated tunable-output impedance matching network.