Self-assembled nanowire array capacitors: capacitance and interface state profile.

Direct characterization of the capacitance and interface states is very important for understanding the electronic properties of a nanowire transistor. However, the capacitance of a single nanowire is too small to precisely measure. In this work we have fabricated metal-oxide-semiconductor capacitors based on a large array of self-assembled Si nanowires. The capacitance and conductance of the nanowire array capacitors are directly measured and the interface state profile is determined by using the conductance method. We demonstrate that the nanowire array capacitor is an effective platform for studying the electronic properties of nanoscale interfaces. This approach provides a useful and efficient metrology for the study of the physics and device properties of nanoscale metal-oxide-semiconductor structures.

Plasmonics and enhanced magneto-optics in core-shell co-ag nanoparticles.

We present theoretical and experimental studies that explain the observed strong enhancement of the magneto-optical (MO) Faraday rotation in all-metal core-shell Co-Ag nanoparticles (NPs) attributed to localized surface plasmon resonance (LSPR). We also explain why the optical absorption and MO spectra peaks appear blue-shifted with increased Co core size while keeping the NP size constant. Further, we demonstrate direct correlation between the strong LSPR induced electromagnetic fields and the enhanced MO activity of the NPs.

Fabrication, characterization and simulation of high performance Si nanowire-based non-volatile memory cells.

We report the fabrication, characterization and simulation of Si nanowire SONOS-like non-volatile memory with HfO(2) charge trapping layers of varying thicknesses. The memory cells, which are fabricated by self-aligning in situ grown Si nanowires, exhibit high performance, i.e. fast program/erase operations, long retention time and good endurance. The effect of the trapping layer thickness of the nanowire memory cells has been experimentally measured and studied by simulation. As the thickness of HfO(2) increases from 5 to 30 nm, the charge trap density increases as expected, while the program/erase speed and retention remain the same. These data indicate that the electric field across the tunneling oxide is not affected by HfO(2) thickness, which is in good agreement with simulation results. Our work also shows that the Omega gate structure improves the program speed and retention time for memory applications.

Synthesis of nested coaxial multiple-walled nanotubes by atomic layer deposition.

Nested multiple-walled coaxial nanotube structures of transition metal oxides, semiconductors, and metals were successfully synthesized by atomic layer deposition (ALD) techniques utilizing nanoporous anodic aluminum oxide (AAO) as templates. In order to fabricate free-standing tube-in-tube nanostructures, successive ALD nanotubes were grown on the interior template walls of the AAO nanochannels. The coaxial nanotubes were alternated by sacrificial spacers of ALD Al(2)O(3), to be chemically removed to release the nanotubes from the AAO template. In this study, we synthesized a novel nanostructure with up to five nested coaxial nanotubes within AAO templates. This synthesis can be extended to fabricate n-times tube-in-tube nanostructures of different materials with applications in multisensors, broadband detectors, nanocapacitors, and photovoltaic cells.

A low-voltage nano-porous electroosmotic pump.

A low-voltage electroosmotic (EO) micropump based on an anodic aluminum oxide (AAO) nano-porous membrane with platinum electrodes coated on both sides has been designed, fabricated, tested, and analyzed. The maximum flow rate of 0.074 ml min(-1) V(-1) cm(-2) for a membrane with porosity of 0.65 was obtained. A theoretical model, considering the head loss along the entire EO micropump system and the finite electrical double layer (EDL) effect on the flow rate, is developed for the first time to analyze the performance of the EO micropump. The theoretical and experimental results are in good agreement. It is revealed that the major head loss could remarkably decrease the flow rate, which thus should be taken into account for the applications of the EO micropump in various Lab-on-a-chip (LOC) devices. However, the effect of the minor head loss on the flow rate is negligible. The resulting flow rate increases with increasing porosity of the porous membrane and kappaa, the ratio of the radius of the nanopore to the Debye length.