Improved Ion/Ioff Current Ratio and Dynamic Resistance of a p-GaN High-Electron-Mobility Transistor Using an Al0.5GaN Etch-Stop Layer.

In this study, we investigated enhance mode (E-mode) p-GaN/AlGaN/GaN high-electron-mobility transistors (HEMTs) with an Al0.5GaN etch-stop layer. Compared with an AlN etch-stop layer, the Al0.5GaN etch-stop layer not only reduced lattice defects but engendered improved DC performance in the device; this can be attributed to the lattice match between the layer and substrate. The results revealed that the Al0.5GaN etch-stop layer could reduce dislocation by 37.5% and improve device characteristics. Compared with the device with the AlN etch-stop layer, the p-GaN HEMT with the Al0.5GaN etch-stop layer achieved a higher drain current on/off ratio (2.47 × 107), a lower gate leakage current (1.55 × 10-5 A/mm), and a lower on-state resistance (21.65 Ω·mm); moreover, its dynamic RON value was reduced to 1.69 (from 2.26).

Hole Injection Effect and Dynamic Characteristic Analysis of Normally Off p-GaN HEMT with AlGaN Cap Layer on Low-Resistivity SiC Substrate.

A p-GaN HEMT with an AlGaN cap layer was grown on a low resistance SiC substrate. The AlGaN cap layer had a wide band gap which can effectively suppress hole injection and improve gate reliability. In addition, we selected a 0° angle and low resistance SiC substrate which not only substantially reduced the number of lattice dislocation defects caused by the heterogeneous junction but also greatly reduced the overall cost. The device exhibited a favorable gate voltage swing of 18.5 V (@IGS = 1 mA/mm) and an off-state breakdown voltage of 763 V. The device dynamic characteristics and hole injection behavior were analyzed using a pulse measurement system, and Ron was found to increase and VTH to shift under the gate lag effect.

Optimization of the Field Plate Design of a 1200 V p-GaN Power High-Electron-Mobility Transistor.

This study optimized the field plate (FP) design (i.e., the number and positions of FP layers) of p-GaN power high-electron-mobility transistors (HEMTs) on the basic of simulations conducted using the technology computer-aided design software of Silvaco. Devices with zero, two, and three FP layers were designed. The FP layers of the HEMTs dispersed the electric field between the gate and drain regions. The device with two FP layers exhibited a high off-state breakdown voltage of 1549 V because of the long distance between its first FP layer and the channel. The devices were subjected to high-temperature reverse bias and high-temperature gate bias measurements to examine their characteristics, which satisfied the reliability specifications of JEDEC.

High Thermal Dissipation of Normally off p-GaN Gate AlGaN/GaN HEMTs on 6-Inch N-Doped Low-Resistivity SiC Substrate.

Efficient heat removal through the substrate is required in high-power operation of AlGaN/GaN high-electron-mobility transistors (HEMTs). Thus, a SiC substrate was used due to its popularity. This article reports the electrical characteristics of normally off p-GaN gate AlGaN/GaN high-electron-mobility transistors (HEMTs) on a low-resistivity SiC substrate compared with the traditional Si substrate. The p-GaN HEMTs on the SiC substrate possess several advantages, including electrical characteristics and good qualities of epitaxial crystals, especially on temperature performance. Additionally, the price of the low-resistivity SiC substrate is three times lower than the ordinary SiC substrate.

Characteristic Analysis of AlGaN/GaN HEMT with Composited Buffer Layer on High-Heat Dissipation Poly-AlN Substrates.

In this study, an AlGaN/GaN high-electron-mobility transistor (HEMT) was grown through metal organic chemical vapor deposition on a Qromis Substrate Technology (QST). The GaN on the QST device exhibited a superior heat dissipation performance to the GaN on a Si device because of the higher thermal conductivity of the QST substrate. Thermal imaging analysis indicated that the temperature variation of the GaN on the QST device was 4.5 °C and that of the GaN on the Si device was 9.2 °C at a drain-to-source current (IDS) of 300 mA/mm following 50 s of operation. Compared with the GaN HEMT on the Si device, the GaN on the QST device exhibited a lower IDS degradation at high temperatures (17.5% at 400 K). The QST substrate is suitable for employment in different temperature environments because of its high thermal stability.

Normally-Off p-GaN Gated AlGaN/GaN MIS-HEMTs with ALD-Grown Al2O3/AlN Composite Gate Insulator.

A metal-insulator-semiconductor p-type GaN gate high-electron-mobility transistor (MIS-HEMT) with an Al2O3/AlN gate insulator layer deposited through atomic layer deposition was investigated. A favorable interface was observed between the selected insulator, atomic layer deposition-grown AlN, and GaN. A conventional p-type enhancement-mode GaN device without an Al2O3/AlN layer, known as a Schottky gate (SG) p-GaN HEMT, was also fabricated for comparison. Because of the presence of the Al2O3/AlN layer, the gate leakage and threshold voltage of the MIS-HEMT improved more than those of the SG-HEMT did. Additionally, a high turn-on voltage was obtained. The MIS-HEMT was shown to be reliable with a long lifetime. Hence, growing a high-quality Al2O3/AlN layer in an HEMT can help realize a high-performance enhancement-mode transistor with high stability, a large gate swing region, and high reliability.