Fast-Response Colorimetric UVC Sensor Made of a Ga2O3 Photocatalyst with a Hole Scavenger.

A fast-response colorimetric ultraviolet-C (UVC) sensor was demonstrated using a gallium oxide (Ga2O3) photocatalyst with small amounts of triethanolamine (TEOA) in methylene blue (MB) solutions and a conventional RGB photodetector. The color of the MB solution changed upon UVC exposure, which was observed using an in situ RGB photodetector. Thereby, the UVC exposure was numerically quantified as an MB reduction rate with the R value of the photodetector, which was linearly correlated with the measured spectral absorbance using a UV-Vis spectrophotometer. Small amount of TEOA in the MB solution served as a hole scavenger, which resulted in fast MB color changes due to the enhanced charge separation. However, excessive TEOA over 5 wt.% started to block the catalytical active site on the surface of Ga2O3, prohibiting the chemical reaction between the MB molecules and catalytic sites. The proposed colorimetric UVC sensor could monitor the detrimental UVC radiation with high responsivity at a low cost.

Mechanical and Electrical Reliability Analysis of Flexible Si Complementary Metal-Oxide-Semiconductor Integrated Circuit.

A flexible Si complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) with multi-level interconnects is realized by thinning down and transferring the CMOS IC onto a polymer substrate. A detailed mechanical and electrical reliability analysis of the flexible Si CMOS IC is carried out in relation to the neutral mechanical plane (NMP) that is extracted from both analytical and numerical modeling. To enhance the reliability by optimizing the NMP position, the thicknesses of all the layers in the CMOS IC on the polymer substrate are carefully adjusted. The NMP-optimized flexible Si CMOS IC maintains its mechanical and electrical stability even at a 5-mm radius bending condition. In addition, to explore the degradation mechanism of the flexible Si CMOS IC, the change of the interface state density of the flexible Si CMOS at different bending conditions is investigated using the charge pumping method. Finally, the long-term electrical reliability of this flexible Si CMOS IC is also investigated.

Influence of Self-Heating Effect on Interface Trap Generation in Highly Flexible Single-Crystalline Si Nanomembrane Transistors.

We analyze the interface trap states generated by the self-heating effect in flexible single-crystalline Si nanomembrane (sc-Si NM) transistors. Despite the excellent device performance (Subthreshold swing: ~61 mV/dec, Ion/off: ~109, Nit: ~5 × 1010 cm-2, µeff: ~250 cm²/V·s) and mechanical flexibility (RB,min ═ 1 mm) of sc-Si NM transistors on a polymer substrate, they are vulnerable to thermal reliability issues due to the poor thermal conductivity (κ < 1 W/m·K) of the polymer substrate. Understanding the detailed mechanism driving heat-related device degradation is key to improving device reliability, life expectancy, and overall device performance. Thus, a charge pumping method was employed to systematically analyze the device degradation caused by the self-heating effect. This enabled the interface trap density to be investigated for the flexible sc-Si NM transistors on a polymer substrate after a bias stress. For comparison, a heat spreading layer (HSL) made using a 1-µm thick Ag film (κ~400 W/m·K) was integrated into the sc-Si NM device to mitigate the self-heating effect. The results showed that the interface trap density was proportional to the self-heating effect. This facilitated the fundamental understanding of the self-heating effect of flexible sc-Si NM transistors, opening a robust route to realizing high performance flexible devices using sc-Si NM.

A High-Performance Top-Gated Graphene Field-Effect Transistor with Excellent Flexibility Enabled by an iCVD Copolymer Gate Dielectric.

A high-performance top-gated graphene field-effect transistor (FET) with excellent mechanical flexibility is demonstrated by implementing a surface-energy-engineered copolymer gate dielectric via a solvent-free process called initiated chemical vapor deposition. The ultrathin, flexible copolymer dielectric is synthesized from two monomers composed of 1,3,5-trimethyl-1,3,5-trivinyl cyclotrisiloxane and 1-vinylimidazole (VIDZ). The copolymer dielectric enables the graphene device to exhibit excellent dielectric performance and substantially enhanced mechanical flexibility. The p-doping level of the graphene can be tuned by varying the polar VIDZ fraction in the copolymer dielectric, and the Dirac voltage (VDirac ) of the graphene FET can thus be systematically controlled. In particular, the VDirac approaches neutrality with higher VIDZ concentrations in the copolymer dielectric, which minimizes the carrier scattering and thereby improves the charge transport of the graphene device. As a result, the graphene FET with 20 nm thick copolymer dielectrics exhibits field-effect hole and electron mobility values of over 7200 and 3800 cm2 V-1 s-1 , respectively, at room temperature. These electrical characteristics remain unchanged even at the 1 mm bending radius, corresponding to a tensile strain of 1.28%. The formed gate stack with the copolymer gate dielectric is further investigated for high-frequency flexible device applications.

Preparation of Wrinkled Graphene Oxide Using Solution Method.

Wrinkled graphene oxide (WGO) is formed using the solution method. The sub-µm-sized wrinkles are generated on the GO surface, with more wrinkles forming as the GaCl3 in the solution increases. The wrinkles are observed using scanning electron microscopy (SEM) and atomic force microscopy (AFM) methods. The OH bonds connected to the GO surface are believed to cause the WGO, and these additional chemical bonds are detected via the Fourier transform infrared spectroscopy (FTIR) and Raman spectroscopy. As with the wrinkled graphene, the wrinkled GO provides a much larger surface area and can expedite the production of advanced sensor and energy charging devices.

Vertically Formed Graphene Stripe for 3D Field-Effect Transistor Applications.

A 100-nm wide, vertically formed graphene stripe (GS) is demonstrated for three-dimensional (3D) electronic applications. The GS forms along the sidewall of a thin nickel film. It is possible to further scale down the GS width by engineering the deposited thickness of the atomic layer deposition (ALD) Ni film. Unlike a conventional GS or graphene nanoribbon (GNR), the vertically formed GS is made without a graphene transfer and etching process. The process integration of the proposed GS FETs resembles that of currently commercialized vertical NAND flash memory with a design rule of less than 20 nm, implying practical usage of this formed GS for 3D advanced FET applications.

Compliment Graphene Oxide Coating on Silk Fiber Surface via Electrostatic Force for Capacitive Humidity Sensor Applications.

Cylindrical silk fiber (SF) was coated with Graphene oxide (GO) for capacitive humidity sensor applications. Negatively charged GO in the solution was attracted to the positively charged SF surface via electrostatic force without any help from adhesive intermediates. The magnitude of the positively charged SF surface was controlled through the static electricity charges created on the SF surface. The GO coating ability on the SF improved as the SF's positive charge increased. The GO-coated SFs at various conditions were characterized using an optical microscope, scanning electron microscopy (SEM), energy-dispersive X-ray spectroscopy (EDS), Raman spectroscopy, and LCR meter. Unlike the intact SF, the GO-coated SF showed clear response-recovery behavior and well-behaved repeatability when it was exposed to 20% relative humidity (RH) and 90% RH alternatively in a capacitive mode. This approach allows humidity sensors to take advantage of GO's excellent sensing properties and SF's flexibility, expediting the production of flexible, low power consumption devices at relatively low costs.

A Robust Highly Aligned DNA Nanowire Array-Enabled Lithography for Graphene Nanoribbon Transistors.

Because of its excellent charge carrier mobility at the Dirac point, graphene possesses exceptional properties for high-performance devices. Of particular interest is the potential use of graphene nanoribbons or graphene nanomesh for field-effect transistors. Herein, highly aligned DNA nanowire arrays were crafted by flow-assisted self-assembly of a drop of DNA aqueous solution on a flat polymer substrate. Subsequently, they were exploited as "ink" and transfer-printed on chemical vapor deposited (CVD)-grown graphene substrate. The oriented DNA nanowires served as the lithographic resist for selective removal of graphene, forming highly aligned graphene nanoribbons. Intriguingly, these graphene nanoribbons can be readily produced over a large area (i.e., millimeter scale) with a high degree of feature-size controllability and a low level of defects, rendering the fabrication of flexible two terminal devices and field-effect transistors.

Plasma Nitridation Effect on ß-Ga2O3 Semiconductors.

The electrical and optoelectronic performance of semiconductor devices are mainly affected by the presence of defects or crystal imperfections in the semiconductor. Oxygen vacancies are one of the most common defects and are known to serve as electron trap sites whose energy levels are below the conduction band (CB) edge for metal oxide semiconductors, including ß-Ga2O3. In this study, the effects of plasma nitridation (PN) on polycrystalline ß-Ga2O3 thin films are discussed. In detail, the electrical and optical properties of polycrystalline ß-Ga2O3 thin films are compared at different PN treatment times. The results show that PN treatment on polycrystalline ß-Ga2O3 thin films effectively diminish the electron trap sites. This PN treatment technology could improve the device performance of both electronics and optoelectronics.

Wide-Range Synaptic Current Responses with a Liquid Ga Electrode via a Surface Redox Reaction in a NaOH Solution at Different Molar Concentrations.

A liquid Ga-based synaptic device with two-terminal electrodes is demonstrated in NaOH solutions at 50 °C. The proposed electrochemical redox device using the liquid Ga electrode in the NaOH solution can emulate various biological synapses that require different decay constants. The device exhibits a wide range of current decay times from 60 to 320 ms at different NaOH mole concentrations from 0.2 to 1.6 M. This research marks a step forward in the development of flexible and biocompatible neuromorphic devices that can be utilized for a range of applications where different synaptic strengths are required lasting from a few milliseconds to seconds.

Synaptic Current Response of a Liquid Ga Electrode via a Surface Electrochemical Redox Reaction in a NaOH Solution.

An ionic device using a liquid Ga electrode in a 1 M NaOH solution is proposed to generate artificial neural spike signals. The oxidation and reduction at the liquid Ga surface were investigated for different bias voltages at 50 °C. When the positive sweep voltage from the starting voltage (V S) of 1 V was applied to the Ga electrode, the oxidation current flowed immediately and decreased exponentially with time. The spike and decay current behavior resembled the polarization and depolarization at the influx and extrusion of Ca2+ in biological synapses. Different average decay times of ∼81 and ∼310 ms were implemented for V S of -2 and -5 V, respectively, to mimic the synaptic responses to short- and long-term plasticity; these decay states can be exploited for application in binary electrochemical memory devices. The oxidation mechanism of liquid Ga was studied. The differences in Ga ion concentration due to V S led to differences in oxidation behavior. Our device is beneficial for the organ cell-machine interface system because liquid Ga is biocompatible and flexible; thus, it can be applied in biocompatible and flexible neuromorphic device development for neuroprosthetics, human cell-machine interface formation, and personal health care monitoring.

Impact of Al doping on a hydrothermally synthesized ß-Ga2O3 nanostructure for photocatalysis applications.

Aluminum (Al)-doped beta-phase gallium oxide (ß-Ga2O3) nanostructures with different Al concentrations (0 to 3.2 at%) are synthesized using a hydrothermal method. The single phase of the ß-Ga2O3 is maintained without intermediate phases up to Al 3.2 at% doping. As the Al concentration in the ß-Ga2O3 nanostructures increases, the optical bandgap of the ß-Ga2O3 increases from 4.69 (Al 0%) to 4.8 (Al 3.2%). The physical, chemical, and optical properties of the Al-doped ß-Ga2O3 nanostructures are correlated with photocatalytic activity via the degradation of a methylene blue solution under ultraviolet light (254 nm) irradiation. The photocatalytic activity is enhanced by doping a small amount of substitutional Al atoms (0.6 at%) that presumably create shallow level traps in the band gap. These shallow traps retard the recombination process by separating photogenerated electron-hole pairs. On the other hand, once the Al concentration in the Ga2O3 exceeds 0.6 at%, the crystallographic disorder, oxygen vacancy, and grain boundary-related defects increase as the Al concentration increases. These defect-related energy levels are broadly distributed within the bandgap, which act as carrier recombination centers and thereby degrade the photocatalytic activity. The results of this work provide new opportunities for the synthesis of highly effective ß-Ga2O3-based photocatalysts that can generate hydrogen gas and remove harmful volatile organic compounds.

Enhanced third harmonic generation in ultrathin free-standing ß-Ga2O3 nanomembranes: study on surface and bulk contribution.

Third harmonic generation (THG) has proven its value in surface and interface characterization, high-contrast bio-imaging, and sub-wavelength light manipulation. Although THG is observed widely in general solid and liquid substances, when laser pulses are focused at nanometer-level ultra-thin films, the bulk THG has been reported to play the dominant role. However, there are still third harmonics (TH) generated at the surface of the thin-films, not inside the bulk solid - so-called surface TH, whose relative contribution has not been quantitatively revealed to date. In this study, we quantitatively characterized the surface and bulk contributions of THG at ultra-thin ß-Ga2O3 nanomembranes with control of both the laser and thin-nanomembranes parameters, including the laser peak power, polarization state, number of layers, and nanomembranes thicknesses. Their contributions were studied in detail by analyzing the TH from freestanding ß-Ga2O3 nanomembranes compared with TH from ß-Ga2O3 nanomembranes on glass substrates. The contribution of the TH field from the ß-Ga2O3-air interface was found to be 5.12 times more efficient than that from the ß-Ga2O3-glass interface, and also 1.09 times stronger than the TH excited at bulk 1-µm-thick ß-Ga2O3. Besides, TH from the ß-Ga2O3-air interface was found to be 20% more sensitive to the crystalline structure than that from the ß-Ga2O3-glass interface. This research work deepens our understanding of surface and bulk THG from crystalline materials and provides new possibilities towards designing highly efficient nonlinear optical materials for bio-imaging, energy-harvesting, and ultrafast laser development.

Highly Aligned Polymeric Nanowire Etch-Mask Lithography Enabling the Integration of Graphene Nanoribbon Transistors.

Graphene nanoribbons are a greatly intriguing form of nanomaterials owing to their unique properties that overcome the limitations associated with a zero bandgap of two-dimensional graphene at room temperature. Thus, the fabrication of graphene nanoribbons has garnered much attention for building high-performance field-effect transistors. Consequently, various methodologies reported previously have brought significant progress in the development of highly ordered graphene nanoribbons. Nonetheless, easy control in spatial arrangement and alignment of graphene nanoribbons on a large scale is still limited. In this study, we explored a facile, yet effective method for the fabrication of graphene nanoribbons by employing orientationally controlled electrospun polymeric nanowire etch-mask. We started with a thermal chemical vapor deposition process to prepare graphene monolayer, which was conveniently transferred onto a receiving substrate for electrospun polymer nanowires. The polymeric nanowires act as a robust etching barrier underlying graphene sheets to harvest arrays of the graphene nanoribbons. On varying the parametric control in the process, the size, morphology, and width of electrospun polymer nanowires were easily manipulated. Upon O2 plasma etching, highly aligned arrays of graphene nanoribbons were produced, and the sacrificial polymeric nanowires were completely removed. The graphene nanoribbons were used to implement field-effect transistors in a bottom-gated configuration. Such approaches could realistically yield a relatively improved current on-off ratio of ~30 higher than those associated with the usual micro-ribbon strategy, with the clear potential to realize reproducible high-performance devices.

Ultrathin ZrOx-Organic Hybrid Dielectric (EOT 3.2 nm) via Initiated Chemical Vapor Deposition for High-Performance Flexible Electronics.

A one-step synthesis method is introduced and used to form an ultrathin, homogeneous organic-inorganic hybrid dielectric film with a high dielectric constant (high-k), based on initiated chemical vapor deposition. The hybrid dielectric is synthesized from tetrakis-dimethyl-amino-zirconium and 2-hydroxyethyl methacrylate, which are a high-k inorganic material and a soft organic material, respectively. A detailed material analysis on the synthesized ZrOx-organic hybrid (Zr-hybrid) is performed. The Zr-hybrid dielectric has a high dielectric constant of nine, leading to a film equivalent oxide thickness (EOT) as low as 3.2 nm, which is the lowest EOT obtained from a flexible dielectric layer to date. The leakage current density (J) is no larger than 6 × 10-7 A/cm2 at 2 MV/cm, and the breakdown field (Ebreak) was ∼3.3 MV/cm. The J of the Zr-hybrid dielectric remains almost constant even under the 2.5% strain condition, while that of the ZrO2 dielectric breaks down electrically at a tensile strain of less than 1.0%. The Zr-hybrid dielectric shows an energy band gap in the range of 5.2-5.4 eV and exhibits a sufficient valence band offset of around 3.0 eV with a pentacene organic semiconductor. The gate stack of the Zr-hybrid dielectric/pentacene semiconductor shows decent metal-oxide-semiconductor field-effect transistor performance even under a tensile strain of 1.67%, indicating that the Zr-hybrid is a promising gate dielectric for advanced flexible electronic applications.

Novel Vapor-Phase Synthesis of Flexible, Homogeneous Organic-Inorganic Hybrid Gate Dielectric with sub 5 nm Equivalent Oxide Thickness.

Organic-inorganic hybrid dielectrics have attracted considerable attention for improving both the dielectric constant ( k) and mechanical flexibility of the gate dielectric layer for emerging flexible and wearable electronics. However, conventional solution-based hybrid materials, such as nanocomposite and self-assembled nanodielectrics, have limitations in the dielectric quality when the thickness is deep-scaled, which is critical to realizing high-performance flexible devices. This study proposes a novel vapor-phase synthesis method to form an ultrathin, homogeneous, high- k organic-inorganic hybrid dielectric. A series of hybrid dielectrics is synthesized via initiated chemical vapor deposition (iCVD) in a one-step manner, where 2-hydroxyethyl methacrylate and trimethylaluminum are used as the monomer and inorganic precursor, respectively. The thickness and composition are effectively controlled to form a uniform, defect-free hybrid dielectric. As a result, the synthesized hybrid dielectric has a high- k value as high as 7 and exhibits a low leakage current density of less than 3 × 10-7 A/cm2 at 2 MV/cm, even with an equivalent oxide thickness of less than 5 nm. Furthermore, the dielectric layer shows exceptional chemical stability without any degradation in its dielectric performance and a smooth surface morphology. The dielectric layer also has good flexibility, maintaining its excellent dielectric performance under a tensile strain of up to 2.6%. Organic thin-film transistors with the developed hybrid dielectric as the gate dielectric achieved hysteresis-free transfer characteristics, with an operating voltage of up to 4 V and excellent mechanical flexibility as well. The hybrid dielectric synthesized via the iCVD process is a promising candidate for high-performance, low-power flexible electronics.

High-Aspect Ratio ß-Ga2O3 Nanorods via Hydrothermal Synthesis.

High-aspect ratio ß-Ga2O3 nanorods consisting of prism-like crystals were formed using gallium oxyhydroxide and ammonia hydroxide via a hydrothermal synthesis followed by the subsequent calcination process. The formation of high-aspect ratio ß-Ga2O3 nanorods was attributed to the oriented attachment mechanism that was present during the hydrothermal synthesis. A field-effect transistor was fabricated using the high-aspect ratio ß-Ga2O3 nanorod, and it exhibited the typical charge transfer properties of an n-type semiconductor. This facile approach to forming high-aspect ratio nanorods without any surfactants or additives can broaden the science of ß-Ga2O3 and expedite the integration of one-dimensional ß-Ga2O3 into future electronics, sensors, and optoelectronics.

Impedance Spectroscopy Analysis and Equivalent Circuit Modeling of Graphene Oxide Solutions.

The optical and electrical characteristics of a graphene oxide solution (GS) with different graphene oxide (GO) concentrations in de-ionized water are investigated via the electrochemical impedance spectroscopy (EIS) method. The measurement results produced by the EIS for the GS are represented with both Bode and Nyquist plots in a frequency range from 1 kHz to 10 MHz. Using these results, we develop an equivalent circuit model as a function of the GO concentration, representing the GS as a mixed circuit of two-dimensional (2D) GO dispersed in parallel in de-ionized (DI) water. The underlying physics of the current-flowing behavior in the GS are explained and interpreted using empirical circuit models; the circuit model also shows that highly resistive GO becomes conductive in GS form in the DI water. The findings in this work should draw new attention toward GSes and related applications, including functional composite materials, catalysts, and filter membranes.

Hybrid Integration of Graphene Analog and Silicon Complementary Metal-Oxide-Semiconductor Digital Circuits.

We demonstrate a hybrid integration of a graphene-based analog circuit and a silicon-based digital circuit in order to exploit the strengths of both graphene and silicon devices. This mixed signal circuit integration was achieved using a three-dimensional (3-D) integration technique where a graphene FET multimode phase shifter is fabricated on top of a silicon complementary metal-oxide-semiconductor field-effect transistor (CMOS FET) ring oscillator. The process integration scheme presented here is compatible with the conventional silicon CMOS process, and thus the graphene circuit can successfully be integrated on current semiconductor technology platforms for various applications. This 3-D integration technique allows us to take advantage of graphene's excellent inherent properties and the maturity of current silicon CMOS technology for future electronics.

Valley-engineered ultra-thin silicon for high-performance junctionless transistors.

Extremely thin silicon show good mechanical flexibility because of their 2-D like structure and enhanced performance by the quantum confinement effect. In this paper, we demonstrate a junctionless FET which reveals a room temperature quantum confinement effect (RTQCE) achieved by a valley-engineering of the silicon. The strain-induced band splitting and a quantum confinement effect induced from ultra-thin-body silicon are the two main mechanisms for valley engineering. These were obtained from the extremely well-controlled silicon surface roughness and high tensile strain in silicon, thereupon demonstrating a device mobility increase of ~500% in a 2.5 nm thick silicon channel device.