Gated three-terminal device architecture to eliminate persistent photoconductivity in oxide semiconductor photosensor arrays.

The composition of amorphous oxide semiconductors, which are well known for their optical transparency, can be tailored to enhance their absorption and induce photoconductivity for irradiation with green, and shorter wavelength light. In principle, amorphous oxide semiconductor-based thin-film photoconductors could hence be applied as photosensors. However, their photoconductivity persists for hours after illumination has been removed, which severely degrades the response time and the frame rate of oxide-based sensor arrays. We have solved the problem of persistent photoconductivity (PPC) by developing a gated amorphous oxide semiconductor photo thin-film transistor (photo-TFT) that can provide direct control over the position of the Fermi level in the active layer. Applying a short-duration (10 ns) voltage pulse to these devices induces electron accumulation and accelerates their recombination with ionized oxygen vacancy sites, which are thought to cause PPC. We have integrated these photo-TFTs in a transparent active-matrix photosensor array that can be operated at high frame rates and that has potential applications in contact-free interactive displays.

Nanoscale RRAM-based synaptic electronics: toward a neuromorphic computing device.

Efforts to develop scalable learning algorithms for implementation of networks of spiking neurons in silicon have been hindered by the considerable footprints of learning circuits, which grow as the number of synapses increases. Recent developments in nanotechnologies provide an extremely compact device with low-power consumption.In particular, nanoscale resistive switching devices (resistive random-access memory (RRAM)) are regarded as a promising solution for implementation of biological synapses due to their nanoscale dimensions, capacity to store multiple bits and the low energy required to operate distinct states. In this paper, we report the fabrication, modeling and implementation of nanoscale RRAM with multi-level storage capability for an electronic synapse device. In addition, we first experimentally demonstrate the learning capabilities and predictable performance by a neuromorphic circuit composed of a nanoscale 1 kbit RRAM cross-point array of synapses and complementary metal-oxide-semiconductor neuron circuits. These developments open up possibilities for the development of ubiquitous ultra-dense, ultra-low-power cognitive computers.

A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O(5-x)/TaO(2-x) bilayer structures.

Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaO(x)-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 10(12). Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.

Modeling for multilevel switching in oxide-based bipolar resistive memory.

We report a physical model for multilevel switching in oxide-based bipolar resistive memory (ReRAM). To confirm the validity of the model, we conduct experiments with tantalum-oxide-based ReRAM of which multi-resistance levels are obtained by reset voltage modifications. It is also noticeable that, in addition to multilevel switching capability, the ReRAM exhibits extremely different switching timescales, i.e. of the order of 10(-7) s to 10(0) s, with regard to reset voltages of only a few volts difference which can be well explained by our model. It is demonstrated that with this simple model, multilevel switching behavior in oxide bipolar ReRAM can be described not only qualitatively but also quantitatively.

Electrical manipulation of nanofilaments in transition-metal oxides for resistance-based memory.

The fabrication of controlled nanostructures such as quantum dots, nanotubes, nanowires, and nanopillars has progressed rapidly over the past 10 years. However, both bottom-up and top-down methods to integrate the nanostructures are met with several challenges. For practical applications with the high level of the integration, an approach that can fabricate the required structures locally is desirable. In addition, the electrical signal to construct and control the nanostructures can provide significant advantages toward the stability and ordering. Through experiments on the negative resistance switching phenomenon in Pt-NiO-Pt structures, we have fabricated nanofilament channels that can be electrically connected or disconnected. Various analyses indicate that the nanofilaments are made of nickel and are formed at the grain boundaries. The scaling behaviors of the nickel nanofilaments were closely examined, with respect to the switching time, power, and resistance. In particular, the 100 nm x 100 nm cell was switchable on the nanosecond scale, making them ideal for the basis for high-speed, high-density, nonvolatile memory applications.

Physical electro-thermal model of resistive switching in bi-layered resistance-change memory.

Tantalum-oxide-based bi-layered resistance-change memories (RRAMs) have recently improved greatly with regard to their memory performances. The formation and rupture of conductive filaments is generally known to be the mechanism that underlies resistive switching. The nature of the filament has been studied intensively and several phenomenological models have consistently predicted the resistance-change behavior. However, a physics-based model that describes a complete bi-layered RRAM structure has not yet been demonstrated. Here, a complete electro-thermal resistive switching model based on the finite element method is proposed. The migration of oxygen vacancies is simulated by the local temperature and electric field derived from carrier continuity and heat equations fully coupled in a 3-D geometry, which considers a complete bi-layered structure that includes the top and bottom electrodes. The proposed model accurately accounts for the set/reset characteristics, which provides an in-depth understanding of the nature of resistive switching.

A simple device unit consisting of all NiO storage and switch elements for multilevel terabit nonvolatile random access memory.

Present charge-based silicon memories are unlikely to reach terabit densities because of scaling limits. As the feature size of memory shrinks to just tens of nanometers, there is insufficient volume available to store charge. Also, process temperatures higher than 800 °C make silicon incompatible with three-dimensional (3D) stacking structures. Here we present a device unit consisting of all NiO storage and switch elements for multilevel terabit nonvolatile random access memory using resistance switching. It is demonstrated that NiO films are scalable to around 30 nm and compatible with multilevel cell technology. The device unit can be a building block for 3D stacking structure because of its simple structure and constituent, high performance, and process temperature lower than 300 °C. Memory resistance switching of NiO storage element is accompanied by an increase in density of grain boundary while threshold resistance switching of NiO switch element is controlled by current flowing through NiO film.