Active phase correction of high resolution silicon photonic arrayed waveguide gratings.

Arrayed waveguide gratings provide flexible spectral filtering functionality for integrated photonic applications. Achieving narrow channel spacing requires long optical path lengths which can greatly increase the footprint of devices. High index contrast waveguides, such as those fabricated in silicon-on-insulator wafers, allow tight waveguide bends which can be used to create much more compact designs. Both the long optical path lengths and the high index contrast contribute to significant optical phase error as light propagates through the device. Therefore, silicon photonic arrayed waveguide gratings require active or passive phase correction following fabrication. Here we present the design and fabrication of compact silicon photonic arrayed waveguide gratings with channel spacings of 50, 10 and 1 GHz. The largest device, with 11 channels of 1 GHz spacing, has a footprint of only 1.1 cm2. Using integrated thermo-optic phase shifters, the phase error is actively corrected. We present two methods of phase error correction and demonstrate state-of-the-art cross-talk performance for high index contrast arrayed waveguide gratings. As a demonstration of possible applications, we perform RF channelization with 1 GHz resolution. Additionally, we generate unique spectral filters by applying non-zero phase offsets calculated by the Gerchberg Saxton algorithm.

Circuit model of a multiple-quantum-well diode.

A circuit model for a multiple-quantum-well p-i-n diode that can be used in conjunction with circuit simulation programs to simulate the performance of a variety of self-electro-optic-effect devices (SEED's) and the systems that they can be used in is described The novel aspect of the model is that it permits circuits with both optical and electrical connections between quantum-well diodes to be analyzed. A photonic ring counter that uses symmetric SEED's is given as an example, and a good agreement is shown between the model and the experiment.

Relationships between speed and tolerances for self-electro-optic-effect devices.

We describe a method of calculating the relationship between system bit rates and tolerances to variations in optical powers for self-electro-optic-effect devices (SEED's). We show that high-contrast-ratio devices have improved bit rates in the presence of optical-power variations even for differential devices. We also calculate the ratios of control-beam to signal-beam powers and transfer-beam to clock-beam powers for logic SEED switching nodes and shift registers. Last, we show that the bit rate of optoelectronically cascaded devices, such as the logic SEED shift register, is comparable with that of optically cascaded symmetric SEED's.

Self-routing crossbar packet switch employing free-space optics for chip-to-chip Interconnections.

A nonblocking crossbar network that employs free-space optical interconnections between optoelectronic switching nodes is proposed. The architecture can be implemented using standard electronic technologies for the switching logic, systematic self-electro-optic effect devices for modulators and detectors, and fairly simple optics to connect adjacent chips in the network. Since optical interconnections are only required between adjacent chips, this architecture may have advantages compared with other architectures that have been proposed using optical interconnections between electronic chips. In addition, a simple routing scheme is discussed that permits the optical crossbar network to be operated as a self-routing packet switch. This packet switch provides for contention resolution, priority routing, and automatic increases in the priority of blocked packets. An example illustrating one implementation of the network is then described and analyzed.

Analysis of control subsystems for free-space photonic switching architectures.

Four different methods of injecting control signals into photonic switches are compared. A control injection model based on time-division-multiplexed switching is developed, and the analysis studies the effects of the different control injection schemes on network performance, system complexity, and system packaging. Serious system-level limitations are identified for all the control injection schemes in switching networks with high reconfiguration rates.

Introduction to the feature on spatial light modulators and their applications.

The special issue of Applied Optics on spatial light modulators presents a collection of papers that describe improvements in basic devices, smart pixels, and system applications.

Design and demonstration of a high-speed, multichannel, optical-sampling oscilloscope.

Free-space digital optical systems have demonstrated the capability to provide thousands of optical connections between optoelectronic chips. This dense concentration of channels creates substantial challenges in monitoring individual connections for diagnostic purposes without compromising performance. Prom the concept of stroboscopic techniques, we have designed and constructed a multichannel optical diagnostic tool that operates analogously to an electronic-sampling oscilloscope. The tool is economically constructed by the use of commercially available video cameras and video-enhanced personal computers. An integrated software application operates the tool and displays multiple-channel waveforms. We demonstrate the oscilloscope-sampling optical waveforms of a two-dimensional optoelectronic modulator array operating at data rates from 0.5 to 4 Gbits/s.

Photonic ring counter using batch-fabricated symmetric self-electro-optic-effect devices.

We describe a photonic ring counter that demonstrates cascadability of batch-fabricated symmetric self-electrooptic-effect devices at a bit rate of 12.5 Mbits/sec for conventional operation and at a bit rate of 50 Mbits/sec when the devices are operated as optical signal sense amplifiers. In each of these experiments the average laser power incident upon each device was less than 1 mW. The system switching speeds agree well with speeds calculated by using the measured switching energies of the devices.

Wavelength optimization of quantum-well modulators in smart pixels.

We extend our recent general discussion of electroabsorption and refraction in multiple-quantum-well modulators to determine the optimum modulator design for smart-pixel applications. In addition to the optimum operating wavelength shift, from that of the zero-voltage exciton, we determine the optimum number of quantum wells, and we calculate the reflectivity change and the contrast ratio obtainable. This analysis is undertaken for both simple detectors and modulators, meaning that they are antireflection coated, as well as for devices that include Fabry-Perot resonators. The optimization is performed on a figure of merit that is inversely proportional to the incident optical read energy required on a device to switch another, downstream device. We maximize the figure of merit to minimize the optical read energy. An interesting result is that there should be no significant improvement in our smart-pixel circuit figure of merit with the use of Fabry-Perot resonant modulators and detectors. Our results are, of course, material-system specific, but for the 850-nm AlGalAs/GaAs quantum-well system the optimum wavelength shift from the exciton location is approximately 6 nm. The general trends and approach are applicable to other material systems.

Free-space photonic switching architectures based on extended generalized shuffle networks.

A new class of networks that is well suited for free-space photonic switching applications is described. These networks are known as extended generalized shuffle networks. It is shown that these networks can provide low blocking probabilities while requiring low hardware costs. In fact, if sufficient hardware is added to these networks, they become strictly nonblocking networks (with blocking probabilities equal to zero). The hardware cost of an extended generalized shuffle network can be modified to yield any desired blocking probability, so cost-effective designs are possible. In addition, it is shown that these networks are extremely fault tolerant, and they can also be designed to have high system availabilities. Because the networks can use various types of interconnections to connect the nodes and because the nodes can have various types of functionality, these networks also provide high degrees of flexibility that can be used to optimize a free-space photonic design. The design of extended generalized shuffle networks based on a particular node type that is easy to implement with symmetric self-electro-opticeffect devices is studied.

Shuffle-equivalent interconnection topologies based on computer-generated binary-phase gratings.

Several different shuffle-equivalent interconnection topologies that can be used within the optical link stages of photonic-switching networks are studied. These schemes include the two shuffle, the two banyan, and the segmented two shuffle, which can be used to interconnect two-input, two-output switching nodes. The schemes also include the four shuffle and the four banyan, which can be used to interconnect four-input, four-output switching nodes. (Note: The segmented two shuffle and the four banyan are novel interconnection topologies that were developed to satisfy some of the constraints of free-space digital optics). It is shown that each of these interconnection topologies can be implemented by the use of relatively simple imaging optics that contain space-invariant computer-generated binaryphase gratings. The effects of node type and interconnection topology on the laser power requirements and the optical component complexity within the resulting systems are also studied. The general class of networks nown as extended generalized shuffle networks is used as a baseline for the analysis. It is shown that (2, 1, 1) nodes and (2, 2, 2) nodes connected by two-banyan interconnections can produce power-efficient and cost-effective systems. The results should help identify the architectural trade-offs that exist when a node type and an interconnection topology are selected for implementation within a switching system based on free-space digital optics.

Optical logic using electrically connected quantum well PIN diode modulators and detectors.

We present new optoelectronic logic devices or circuits consisting of electrically connected quantum well PIN diodes capable of implementing any boolean logic function. One class of circuits uses single beams to represent the logic levels and compares their intensities to a locally generated reference signal. A second class of circuits routes signals as differential pairs. The connections of diodes in these circuits resemble the transistor connections in NMOS and CMOS logic families. We demonstrate simple optical programmable logic arrays (e.g., E = AB + CD) using both of these classes of circuits.

Asynchronous transfer mode distribution network by use of an optoelectronic VLSI switching chip.

We describe a new optoelectronic switching system demonstration that implements part of the distribution fabric for a large asynchronous transfer mode (ATM) switch. The system uses a single optoelectronic VLSI modulator-based switching chip with more than 4000 optical input-outputs. The optical system images the input fibers from a two-dimensional fiber bundle onto this chip. A new optomechanical design allows the system to be mounted in a standard electronic equipment frame. A large section of the switch was operated as a 208-Mbits/s time-multiplexed space switch, which can serve as part of an ATM switch by use of an appropriate out-of-band controller. A larger section with 896 input light beams and 256 output beams was operated at 160 Mbits/s as a slowly reconfigurable space switch.

Five-stage free-space optical switching network with field-effect transistor self-electro-optic-effect-device smart-pixel arrays.

The design, construction, and operational testing of a five-stage, fully interconnected 32 × 16 switching fabric by the use of smart-pixel (2, 1, 1) switching nodes are described. The arrays of switching nodes use monolithically integrated GaAs field-effect transistors, multiple-quantum-well p-i-n detectors, and self-electro-optic-device modulators. Each switching node incorporates 25 field-effect transistors and 17 p-i-n diodes to realize two differential optical receivers, the 2 × 1 node switching logic, a single-bit node control memory, and one differential optical transmitter. The five stages of node arrays are interconnected to form a two-dimensional banyan network by the use of Fourier-plane computer-generated holograms. System input and output are made by two-dimensional fiber-bundle matrices, and the system optical hardware design incorporates frequency-stabilized lasers, pupil-division beam combination, and a hybrid micro-macro lens for fiber-bundle imaging. Optomechanical packaging of the system ut lizes modular kinematic component positioning and active thermal control to enable simple rapid assembly. Two preliminary operational experiments are completed. In the first experiment, five stages are operated at 50 Mbits/s with 15 active inputs and outputs. The second experiment attempts to operate two stages of second-generation node arrays at 155 Mbits/s, with eight of the 15 active nodes functioning correctly along the straight switch-routing paths.

Field-effect-transistor self-electro-optic-effect-device (FET-SEED) electrically addressed differential modulator array.

We describe a 6 × 6 array of electrically addressed field-effect-transistor self-electro-optic-effect-device differential modulators in which each element has a single-stage amplifier to permit an input voltage of less than 1 V to control the output modulators, which can operate at as high as 10 V. The variations in the switching voltages across the array are less than ±70 mV, and the individual array elements are operated at as high as 2 Gbits/s. We also measure cross talk between adjacent elements within the array, measure the dependence of the switching time on the input voltage swing, and calculate the dependence of the switching time that is due to the photocurrent of the modulators.

Experimental investigation of a free-space optical switching network by using symmetric self-electro-optic-effect devices.

A prototype digital free-space photonic switching fabric is demonstrated. It consists of three cascaded 16 x 8 arrays of symmetric self-electro-optic-effect devices that are used as logic gates that implement part of a multistage interconnection network. We discuss architecture, device tolerancing, optical system design, and optomechanical design. This optical circuit is successfully configured as a fully operational array of 32 independent 2 x 2 nodes and operates at 100 kHz.

Quantum well optical tri-state devices.

We demonstrate quantum well tri-state logic devices for possible use in optical bus architectures. These optical devices are analogous to the tri-state devices often used in electronic buses, where each device can be actively on, actively off, or disabled with at most one device on the bus active at a time. We show two methods of generating these tri-state data, one using tri-state quantum well modulators and one using optical tri-state self-electrooptic effect devices, and we demonstrate a simple optical bus consisting of two such devices. Finally, we comment on the limitations on the number of devices that can be connected to a bus of this type.

Photonic page buffer based on GaAs multiple-quantum-well modulators bonded directly over active silicon complementary-metal-oxide-semiconductor (CMOS) circuits.

We present a 2-kbit, 50-Mpage/s, photonic first-in, first-out page buffer based on gallium arsenide/aluminium-gallium arsenide multiple-quantum-well diodes that are flip-chip bonded to submicrometer silicon complementary-metal-oxide-semiconductor circuits. This photonic chip provides nonvolatile storage (buffering), asynchronous-to-synchronous conversion, bandwidth smoothing, tolerance to jitter or skew, spatial format conversion, wavelength conversion, and independent flow control for the input and the output channels. It serves as an interface chip for parallel-accessed optical bit-plane data. It represents the first smart-pixel array that accomplishes the vertical integration of multiple-quantum-well modulators and detectors directly over active silicon VLSI circuits and provides over 340 transistors per optical input-output. Results from high-speed single-channel testing and real-time array operation of the photonic page buffer are reported.

Photonic page buffer based on GaAs multiple-quantum-well modulators bonded directly over active silicon complementary-metal-oxide-semiconductor (CMOS) circuits: errata.

Owing to printing errors, [Appl. Opt. 35, 2439 (1996)] several figures were illegible. The figures are reprinted and briefly reviewed.

Six-stage digital free-space optical switching network using symmetric self-electro-optic-effect devices.

We describe the design and demonstration of an extended generalized shuffle interconnection network, centrally controlled by a personal computer. A banyan interconnection pattern is implemented by use of computer-generated Fourier holograms and custom metallization at each 32 × 32 switching node array. Each array of electrically controlled tristate symmetric self-electro-optic-effect devices has 10,240 optical pinouts and 32 electrical pinouts, and the six-stage system occupies a 9 in. × 12.5 in. (22.9 cm × 31.7 cm) area. Details of the architecture, optical and mechanical design, and system alignment and tolerancing are presented.