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1.
Nature ; 618(7963): 57-62, 2023 Jun.
Artigo em Inglês | MEDLINE | ID: mdl-36972685

RESUMO

Exploiting the excellent electronic properties of two-dimensional (2D) materials to fabricate advanced electronic circuits is a major goal for the semiconductor industry1,2. However, most studies in this field have been limited to the fabrication and characterization of isolated large (more than 1 µm2) devices on unfunctional SiO2-Si substrates. Some studies have integrated monolayer graphene on silicon microchips as a large-area (more than 500 µm2) interconnection3 and as a channel of large transistors (roughly 16.5 µm2) (refs. 4,5), but in all cases the integration density was low, no computation was demonstrated and manipulating monolayer 2D materials was challenging because native pinholes and cracks during transfer increase variability and reduce yield. Here, we present the fabrication of high-integration-density 2D-CMOS hybrid microchips for memristive applications-CMOS stands for complementary metal-oxide-semiconductor. We transfer a sheet of multilayer hexagonal boron nitride onto the back-end-of-line interconnections of silicon microchips containing CMOS transistors of the 180 nm node, and finalize the circuits by patterning the top electrodes and interconnections. The CMOS transistors provide outstanding control over the currents across the hexagonal boron nitride memristors, which allows us to achieve endurances of roughly 5 million cycles in memristors as small as 0.053 µm2. We demonstrate in-memory computation by constructing logic gates, and measure spike-timing dependent plasticity signals that are suitable for the implementation of spiking neural networks. The high performance and the relatively-high technology readiness level achieved represent a notable advance towards the integration of 2D materials in microelectronic products and memristive applications.

2.
Nat Commun ; 15(1): 2812, 2024 Apr 01.
Artigo em Inglês | MEDLINE | ID: mdl-38561389

RESUMO

To reach the energy efficiency and the computing capability of biological neural networks, novel hardware systems and paradigms are required where the information needs to be processed in both spatial and temporal domains. Resistive switching memory (RRAM) devices appear as key enablers for the implementation of large-scale neuromorphic computing systems with high energy efficiency and extended scalability. Demonstrating a full set of spatiotemporal primitives with RRAM-based circuits remains an open challenge. By taking inspiration from the neurobiological processes in the human auditory systems, we develop neuromorphic circuits for memristive tonotopic mapping via volatile RRAM devices. Based on a generalized stochastic device-level approach, we demonstrate the main features of signal processing of cochlea, namely logarithmic integration and tonotopic mapping of signals. We also show that our tonotopic classification is suitable for speech recognition. These results support memristive devices for physical processing of temporal signals, thus paving the way for energy efficient, high density neuromorphic systems.

3.
Sci Adv ; 8(51): eade0072, 2022 Dec 23.
Artigo em Inglês | MEDLINE | ID: mdl-36563153

RESUMO

With increasing computing demands, serial processing in von Neumann architectures built with zeroth-order complexity digital circuits is saturating in computational capacity and power, entailing research into alternative paradigms. Brain-inspired systems built with memristors are attractive owing to their large parallelism, low energy consumption, and high error tolerance. However, most demonstrations have thus far only mimicked primitive lower-order biological complexities using devices with first-order dynamics. Memristors with higher-order complexities are predicted to solve problems that would otherwise require increasingly elaborate circuits, but no generic design rules exist. Here, we present second-order dynamics in halide perovskite memristive diodes (memdiodes) that enable Bienenstock-Cooper-Munro learning rules capturing both timing- and rate-based plasticity. A triplet spike timing-dependent plasticity scheme exploiting ion migration, back diffusion, and modulable Schottky barriers establishes general design rules for realizing higher-order memristors. This higher order enables complex binocular orientation selectivity in neural networks exploiting the intrinsic physics of the devices, without the need for complicated circuitry.

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