RESUMO
Given the current maturity of printed technologies, Organic Thin-Film Transistors (OTFT) still show high initial variability, which can be beneficial for its exploitation in security applications. In this work, the process-related variability and aging of commercial OTFTs have been characterized to evaluate the feasibility of OTFTs-based Physical Unclonable Functions (PUFs) implementation. For our devices, ID-based PUFs show good uniformity and uniqueness. However, PUFs' reliability could be compromised because of the observed transient and aging effects in the OTFTs, which could hinder the reproducibility of the generated fingerprints. A systematic study of the aging of OTFTs has been performed to evaluate the PUFs' reliability. Our results suggest that the observed transient and aging effects could be mitigated so that the OTFTs-based PUFs' reliability could be improved.
RESUMO
Low-power, high-performance metal-insulator-metal (MIM) non-volatile resistive memories based on HfO2 high- k dielectric are fabricated using a drop-on-demand inkjet printing technique as a low-cost and eco-friendly method. The characteristics of resistive switching of Pt (bottom)/HfO2/Ag (top) stacks on Si/SiO2 substrates are investigated in order to study the bottom electrode's interaction with the HfO2 dielectric layer and the resulting effects on resistive switching. The devices show low Set and Reset voltages, high ON/OFF current ratio, and relatively low switching current (â¼1 µA), which are comparable to the characteristics of current commercial CMOS memories. In order to understand the resistive switching mechanism, direct structural observation is carried out by field-emission scanning electron microscopy (FE-SEM) and high-resolution transmission electron microscopy (HRTEM) on cross-sectioned samples prepared by focused ion beam (FIB). In addition, electron energy loss spectroscopy (EELS) inspections discard a silver electro-migration effect.
RESUMO
In this study, atomic force microscopy-related techniques have been used to investigate, at the nanoscale, how the polycrystallization of an Al2O3-based gate stack, after a thermal annealing process, affects the variability of its electrical properties. The impact of an electrical stress on the electrical conduction and the charge trapping of amorphous and polycrystalline Al2O3 layers have been also analyzed.