RESUMO
Grain boundaries in graphene are formed by the joining of islands during the initial growth stage, and these boundaries govern transport properties and related device performance. Although information on the atomic rearrangement at graphene grain boundaries can be obtained using transmission electron microscopy and scanning tunnelling microscopy, large-scale information regarding the distribution of graphene grain boundaries is not easily accessible. Here we use optical microscopy to observe the grain boundaries of large-area graphene (grown on copper foil) directly, without transfer of the graphene. This imaging technique was realized by selectively oxidizing the underlying copper foil through graphene grain boundaries functionalized with O and OH radicals generated by ultraviolet irradiation under moisture-rich ambient conditions: selective diffusion of oxygen radicals through OH-functionalized defect sites was demonstrated by density functional calculations. The sheet resistance of large-area graphene decreased as the graphene grain sizes increased, but no strong correlation with the grain size of the copper was revealed, in contrast to a previous report. Furthermore, the influence of graphene grain boundaries on crack propagation (initialized by bending) and termination was clearly visualized using our technique. Our approach can be used as a simple protocol for evaluating the grain boundaries of other two-dimensional layered structures, such as boron nitride and exfoliated clays.
RESUMO
Despite recent progress in producing transparent and bendable thin-film transistors using graphene and carbon nanotubes, the development of stretchable devices remains limited either by fragile inorganic oxides or polymer dielectrics with high leakage current. Here we report the fabrication of highly stretchable and transparent field-effect transistors combining graphene/single-walled carbon nanotube (SWCNT) electrodes and a SWCNT-network channel with a geometrically wrinkled inorganic dielectric layer. The wrinkled Al2O3 layer contained effective built-in air gaps with a small gate leakage current of 10(-13) A. The resulting devices exhibited an excellent on/off ratio of ~10(5), a high mobility of ~40 cm(2) V(-1) s(-1) and a low operating voltage of less than 1 V. Importantly, because of the wrinkled dielectric layer, the transistors retained performance under strains as high as 20% without appreciable leakage current increases or physical degradation. No significant performance loss was observed after stretching and releasing the devices for over 1,000 times. The sustainability and performance advances demonstrated here are promising for the adoption of stretchable electronics in a wide variety of future applications.