Data Processing and Information Classification-An In-Memory Approach.

To live in the information society means to be surrounded by billions of electronic devices full of sensors that constantly acquire data. This enormous amount of data must be processed and classified. A solution commonly adopted is to send these data to server farms to be remotely elaborated. The drawback is a huge battery drain due to high amount of information that must be exchanged. To compensate this problem data must be processed locally, near the sensor itself. But this solution requires huge computational capabilities. While microprocessors, even mobile ones, nowadays have enough computational power, their performance are severely limited by the Memory Wall problem. Memories are too slow, so microprocessors cannot fetch enough data from them, greatly limiting their performance. A solution is the Processing-In-Memory (PIM) approach. New memories are designed that can elaborate data inside them eliminating the Memory Wall problem. In this work we present an example of such a system, using as a case of study the Bitmap Indexing algorithm. Such algorithm is used to classify data coming from many sources in parallel. We propose a hardware accelerator designed around the Processing-In-Memory approach, that is capable of implementing this algorithm and that can also be reconfigured to do other tasks or to work as standard memory. The architecture has been synthesized using CMOS technology. The results that we have obtained highlights that, not only it is possible to process and classify huge amount of data locally, but also that it is possible to obtain this result with a very low power consumption.

A Prototype Microwave System for 3D Brain Stroke Imaging.

This work focuses on brain stroke imaging via microwave technology. In particular, the open issue of monitoring patients after stroke onset is addressed here in order to provide clinicians with a tool to control the effectiveness of administered therapies during the follow-up period. In this paper, a novel prototype is presented and characterized. The device is based on a low-complexity architecture which makes use of a minimum number of properly positioned and designed antennas placed on a helmet. It exploits a differential imaging approach and provides 3D images of the stroke. Preliminary experiments involving a 3D phantom filled with brain tissue-mimicking liquid confirm the potential of the technology in imaging a spherical target mimicking a stroke of a radius equal to 1.25 cm.

Experimental Validation of a Microwave System for Brain Stroke 3-D Imaging.

This paper experimentally validates the capability of a microwave prototype device to localize hemorrhages and ischemias within the brain as well as proposes an innovative calibration technique based on the measured data. In the reported experiments, a 3-D human-like head phantom is considered, where the brain is represented either with a homogeneous liquid mimicking brain dielectric properties or with ex vivo calf brains. The microwave imaging (MWI) system works at 1 GHz, and it is realized with a low-complexity architecture formed by an array of twenty-four printed monopole antennas. Each antenna is embedded into the "brick" of a semi-flexible dielectric matching medium, and it is positioned conformal to the head upper part. The imaging algorithm exploits a differential approach and provides 3-D images of the brain region. It employs the singular value decomposition of the discretized scattering operator obtained via accurate numerical models. The MWI system analysis shows promising reconstruction results and extends the device validation.

New Logic-In-Memory Paradigms: An Architectural and Technological Perspective.

Processing systems are in continuous evolution thanks to the constant technological advancement and architectural progress. Over the years, computing systems have become more and more powerful, providing support for applications, such as Machine Learning, that require high computational power. However, the growing complexity of modern computing units and applications has had a strong impact on power consumption. In addition, the memory plays a key role on the overall power consumption of the system, especially when considering data-intensive applications. These applications, in fact, require a lot of data movement between the memory and the computing unit. The consequence is twofold: Memory accesses are expensive in terms of energy and a lot of time is wasted in accessing the memory, rather than processing, because of the performance gap that exists between memories and processing units. This gap is known as the memory wall or the von Neumann bottleneck and is due to the different rate of progress between complementary metal-oxide semiconductor (CMOS) technology and memories. However, CMOS scaling is also reaching a limit where it would not be possible to make further progress. This work addresses all these problems from an architectural and technological point of view by: (1) Proposing a novel Configurable Logic-in-Memory Architecture that exploits the in-memory computing paradigm to reduce the memory wall problem while also providing high performance thanks to its flexibility and parallelism; (2) exploring a non-CMOS technology as possible candidate technology for the Logic-in-Memory paradigm.