Development of Reliable, High Performance WLCSP for BSI CMOS Image Sensor for Automotive Application.

To meet the urgent market demand for small package size and high reliability performance for automotive CMOS image sensor (CIS) application, wafer level chip scale packaging (WLCSP) technology using through silicon vias (TSV) needs to be developed to replace current chip on board (COB) packages. In this paper, a WLCSP with the size of 5.82 mm × 5.22 mm and thickness of 850 µm was developed for the backside illumination (BSI) CIS chip using a 65 nm node with a size of 5.8 mm × 5.2 mm. The packaged product has 1392 × 976 pixels and a resolution of up to 60 frames per second with more than 120 dB dynamic range. The structure of the 3D package was designed and the key fabrication processes on a 12" inch wafer were investigated. More than 98% yield and excellent optical performance of the CIS package was achieved after process optimization. The final packages were qualified by AEC-Q100 Grade 2.

Design of a Low-Power, Small-Area AEC-Q100-Compliant SENT Transmitter in Signal Conditioning IC for Automotive Pressure and Temperature Complex Sensors in 180 Nm CMOS Technology.

In this paper, a low-power and small-area Single Edge Nibble Transmission (SENT) transmitter design is proposed for automotive pressure and temperature complex sensor applications. To reduce the cost and size of the hardware, the pressure and temperature information is processed with a single integrated circuit (IC) and transmitted at the same time to the electronic control unit (ECU) through SENT. Due to its digital nature, it is immune to noise, has reduced sensitivity to electromagnetic interference (EMI), and generates low EMI. It requires only one PAD for its connectivity with ECU, and thus reduces the pin requirements, simplifies the connectivity, and minimizes the printed circuit board (PCB) complexity. The design is fully synthesizable, and independent of technology. The finite state machine-based approach is employed for area efficient implementation, and to translate the proposed architecture into hardware. The IC is fabricated in 1P6M 180 nm CMOS process with an area of (116 µm × 116 µm) and 4.314 K gates. The current consumption is 50 µA from a 1.8 V supply with a total 90 µW power. For compliance with AEC-Q100 for automotive reliability, a reverse and over voltage protection circuit is also implemented with human body model (HBM) electro-static discharge (ESD) of +6 kV, reverse voltage of -16 V to 0 V, over voltage of 8.2 V to 16 V, and fabricated area of 330 µm × 680 µm. The extensive testing, measurement, and simulation results prove that the design is fully compliant with SAE J2716 standard.