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1.
Proc Natl Acad Sci U S A ; 118(44)2021 11 02.
Artigo em Inglês | MEDLINE | ID: mdl-34716274

RESUMO

Electrolyte-gated transistors (EGTs) hold great promise for next-generation printed logic circuitry, biocompatible integrated sensors, and neuromorphic devices. However, EGT-based complementary circuits with high voltage gain and ultralow driving voltage (<0.5 V) are currently unrealized, because achieving balanced electrical output for both the p- and n-type EGT components has not been possible with current materials. Here we report high-performance EGT complementary circuits containing p-type organic electrochemical transistors (OECTs) fabricated with an ion-permeable organic semiconducting polymer (DPP-g2T) and an n-type electrical double-layer transistor (EDLT) fabricated with an ion-impermeable inorganic indium-gallium-zinc oxide (IGZO) semiconductor. Adjusting the IGZO composition enables tunable EDLT output which, for In:Ga:Zn = 10:1:1 at%, balances that of the DPP-g2T OECT. The resulting hybrid electrolyte-gated inverter (HCIN) achieves ultrahigh voltage gains (>110) under a supply voltage of only 0.7 V. Furthermore, NAND and NOR logic circuits on both rigid and flexible substrates are realized, enabling not only excellent logic response with driving voltages as low as 0.2 V but also impressive mechanical flexibility down to 1-mm bending radii. Finally, the HCIN was applied in electrooculographic (EOG) signal monitoring for recording eye movement, which is critical for the development of wearable medical sensors and also interfaces for human-computer interaction; the high voltage amplification of the present HCIN enables EOG signal amplification and monitoring in which a small ∼1.5 mV signal is amplified to ∼30 mV.

2.
ACS Appl Mater Interfaces ; 13(6): 7470-7475, 2021 Feb 17.
Artigo em Inglês | MEDLINE | ID: mdl-33528986

RESUMO

Two-dimensional transition metal dichalcogenide semiconductors are very promising candidates for future electronic applications with low power consumption due to a low leakage current and high on-off current ratio. In this study, we suggest a complementary circuit consisting of ambipolar WSe2 and n-MoS2 field-effect transistors (FETs), which demonstrate dual functions of a frequency doubler and single inversion AND (SAND) logic gate. In order to reduce the power consumption, a high-quality thin h-BN single crystal is used as a gate dielectric that leads to a low operating voltage of less than 5 V. By combining the low operating voltage with a low operating current in the complementary circuit, a low power consumption of 300 nW (a minimum of 10 pW) has been achieved, which is a significant improvement compared to the tens of µW consumed by a graphene channel. The complementary circuit shows the effective frequency doubling of the input with a dynamic range from 20 to 100 Hz. Furthermore, this circuit satisfies all the truth tables of a SAND logic gate that can be used as a universal logic gate like NAND. Considering that the NAND logic gate generally consists of four transistors, it is significantly advantageous to implement the equivalent circuit SAND logic gate with only two FETs. Our results open up possibilities for analog- and logic-circuit applications based on low-dimensional semiconductors.

3.
ACS Appl Mater Interfaces ; 8(28): 18249-55, 2016 Jul 20.
Artigo em Inglês | MEDLINE | ID: mdl-27348479

RESUMO

We present controllable and reliable complementary organic transistor circuits on a PET substrate using a photoactive dielectric layer of 6-[4'-(N,N-diphenylamino)phenyl]-3-ethoxycarbonylcoumarin (DPA-CM) doped into poly(methyl methacrylate) (PMMA) and an electron-trapping layer of poly(perfluoroalkenyl vinyl ether) (Cytop). Cu was used for a source/drain electrode in both the p-channel and n-channel transistors. The threshold voltage of the transistors and the inverting voltage of the circuits were reversibly controlled over a wide range under a program voltage of less than 10 V and under UV light irradiation. At a program voltage of -2 V, the inverting voltage of the circuits was tuned to be at nearly half of the supply voltage of the circuit. Consequently, an excellent balance between the high and low noise margins (NM) was produced (64% of NMH and 68% of NML), resulting in maximum noise immunity. Furthermore, the programmed circuits showed high stability, such as a retention time of over 10(5) s for the inverter switching voltage. Our findings bring about a flexible, simple way to obtain robust, high-performance organic circuits using a controllable complementary transistor inverter.

4.
Adv Mater ; 25(31): 4302-8, 2013 Aug 21.
Artigo em Inglês | MEDLINE | ID: mdl-23580467

RESUMO

Large-area polymer FET arrays and integrated circuits (ICs) are successfully demonstrated via a simple wire-bar-coating process. Both a highly crystalline conjugated polymer layer and very smooth insulating polymer layer are formed by a consecutive wire-bar-coating process on a 4-inch plastic substrate with a short processing time for application as the active and dielectric layers of OFET arrays and ICs.

5.
Adv Mater ; 25(31): 4210-44, 2013 Aug 21.
Artigo em Inglês | MEDLINE | ID: mdl-23761043

RESUMO

For at least the past ten years printed electronics has promised to revolutionize our daily life by making cost-effective electronic circuits and sensors available through mass production techniques, for their ubiquitous applications in wearable components, rollable and conformable devices, and point-of-care applications. While passive components, such as conductors, resistors and capacitors, had already been fabricated by printing techniques at industrial scale, printing processes have been struggling to meet the requirements for mass-produced electronics and optoelectronics applications despite their great potential. In the case of logic integrated circuits (ICs), which constitute the focus of this Progress Report, the main limitations have been represented by the need of suitable functional inks, mainly high-mobility printable semiconductors and low sintering temperature conducting inks, and evoluted printing tools capable of higher resolution, registration and uniformity than needed in the conventional graphic arts printing sector. Solution-processable polymeric semiconductors are the best candidates to fulfill the requirements for printed logic ICs on flexible substrates, due to their superior processability, ease of tuning of their rheology parameters, and mechanical properties. One of the strongest limitations has been mainly represented by the low charge carrier mobility (µ) achievable with polymeric, organic field-effect transistors (OFETs). However, recently unprecedented values of µ ∼ 10 cm(2) /Vs have been achieved with solution-processed polymer based OFETs, a value competing with mobilities reported in organic single-crystals and exceeding the performances enabled by amorphous silicon (a-Si). Interestingly these values were achieved thanks to the design and synthesis of donor-acceptor copolymers, showing limited degree of order when processed in thin films and therefore fostering further studies on the reason leading to such improved charge transport properties. Among this class of materials, various polymers can show well balanced electrons and holes mobility, therefore being indicated as ambipolar semiconductors, good environmental stability, and a small band-gap, which simplifies the tuning of charge injection. This opened up the possibility of taking advantage of the superior performances offered by complementary "CMOS-like" logic for the design of digital ICs, easing the scaling down of critical geometrical features, and achieving higher complexity from robust single gates (e.g., inverters) and test circuits (e.g., ring oscillators) to more complete circuits. Here, we review the recent progress in the development of printed ICs based on polymeric semiconductors suitable for large-volume micro- and nano-electronics applications. Particular attention is paid to the strategies proposed in the literature to design and synthesize high mobility polymers and to develop suitable printing tools and techniques to allow for improved patterning capability required for the down-scaling of devices in order to achieve the operation frequencies needed for applications, such as flexible radio-frequency identification (RFID) tags, near-field communication (NFC) devices, ambient electronics, and portable flexible displays.

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