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Polarity control in WSe2 double-gate transistors.
Resta, Giovanni V; Sutar, Surajit; Balaji, Yashwanth; Lin, Dennis; Raghavan, Praveen; Radu, Iuliana; Catthoor, Francky; Thean, Aaron; Gaillardon, Pierre-Emmanuel; de Micheli, Giovanni.
Afiliação
  • Resta GV; Integrated System Laboratory (LSI), School of Computer and Communication Science, École Polytechnique Fédérale de Lausanne (EPFL), CH-1015 Lausanne, Switzerland.
  • Sutar S; Department of Physics and Astronomy, KU Leuven, Celestijnenlaan 200D, B-3001, Leuven, Belgium.
  • Balaji Y; IMEC, Kapeldreef 75, B-3001 Leuven, Belgium.
  • Lin D; IMEC, Kapeldreef 75, B-3001 Leuven, Belgium.
  • Raghavan P; IMEC, Kapeldreef 75, B-3001 Leuven, Belgium.
  • Radu I; IMEC, Kapeldreef 75, B-3001 Leuven, Belgium.
  • Catthoor F; IMEC, Kapeldreef 75, B-3001 Leuven, Belgium.
  • Thean A; IMEC, Kapeldreef 75, B-3001 Leuven, Belgium.
  • Gaillardon PE; IMEC, Kapeldreef 75, B-3001 Leuven, Belgium.
  • de Micheli G; Integrated System Laboratory (LSI), School of Computer and Communication Science, École Polytechnique Fédérale de Lausanne (EPFL), CH-1015 Lausanne, Switzerland.
Sci Rep ; 6: 29448, 2016 07 08.
Article em En | MEDLINE | ID: mdl-27390014

Texto completo: 1 Coleções: 01-internacional Base de dados: MEDLINE Idioma: En Ano de publicação: 2016 Tipo de documento: Article

Texto completo: 1 Coleções: 01-internacional Base de dados: MEDLINE Idioma: En Ano de publicação: 2016 Tipo de documento: Article