Improved Retention Performance in Graphene-Ferroelectric Memory Device Through Mitigation of the Surface Roughness of the Ferroelectric Layer.

ABSTRACT

A ferroelectric-gated graphene field-effect transistor was fabricated with a bottom-gate structure. A ferroelectric gate dielectric was formed using the spin-coating method. Two samples were made, one with a single coating and the other with a double coating. It was observed that the data retention times of the two samples were significantly different. When comparing the surface roughness, the surface of the thin film produced by the double coating was much flatter. Based on the observation of the surface morphology, an interfacial layer composed of air was deduced as the origin of both the depolarization and short retention time. That is, when fabricating the graphene-ferroelectric memory device, the importance of the interface treatment could be confirmed. Based on these results, it is expected that a much more reliable device can be realized through surface engineering via a graphene-ferroelectric device process.