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An FPGA-based design for power efficient low delay rate adaptive pacemaker using accelerometer and heart rate sensor.
Srivastava, Rohini; Prusty, Ch Kalyan Kumar; Sahai, Nitin; Tewari, Ravi Prakash; Kumar, Basant.
Afiliação
  • Srivastava R; Electronics and Communication Engineering Department, Motilal Nehru National Institute of Technology Allahabad, Prayagraj, India.
  • Prusty CKK; Electronics and Communication Engineering Department, Motilal Nehru National Institute of Technology Allahabad, Prayagraj, India.
  • Sahai N; Bio-Medical Engineering Department, North-Eastern Hill University, Shillong, India.
  • Tewari RP; Applied Mechanics Department, Motilal Nehru National Institute of Technology Allahabad, Prayagraj, India.
  • Kumar B; Electronics and Communication Engineering Department, Motilal Nehru National Institute of Technology Allahabad, Prayagraj, India.
J Med Eng Technol ; 46(1): 16-24, 2022 Jan.
Article em En | MEDLINE | ID: mdl-34541996
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Texto completo: 1 Coleções: 01-internacional Base de dados: MEDLINE Assunto principal: Marca-Passo Artificial Limite: Humans Idioma: En Ano de publicação: 2022 Tipo de documento: Article
Texto completo
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PubMed Links
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Texto completo: 1 Coleções: 01-internacional Base de dados: MEDLINE Assunto principal: Marca-Passo Artificial Limite: Humans Idioma: En Ano de publicação: 2022 Tipo de documento: Article