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Signal Processing Platform for Long-Range Multi-Spectral Electro-Optical Systems.
Latinovic, Nikola; Popadic, Ilija; Tomic, Branko; Simic, Aleksandar; Milanovic, Petar; Nijemcevic, Srecko; Peric, Miroslav; Veinovic, Mladen.
Afiliação
  • Latinovic N; Department for Postgraduate Studies, Singidunum University, Danijelova 32, 11000 Belgrade, Serbia.
  • Popadic I; Vlatacom Institute of High Technologies, Milutina Milankovica 5, 11070 Belgrade, Serbia.
  • Tomic B; Vlatacom Institute of High Technologies, Milutina Milankovica 5, 11070 Belgrade, Serbia.
  • Simic A; Vlatacom Institute of High Technologies, Milutina Milankovica 5, 11070 Belgrade, Serbia.
  • Milanovic P; Vlatacom Institute of High Technologies, Milutina Milankovica 5, 11070 Belgrade, Serbia.
  • Nijemcevic S; Vlatacom Institute of High Technologies, Milutina Milankovica 5, 11070 Belgrade, Serbia.
  • Peric M; Vlatacom Institute of High Technologies, Milutina Milankovica 5, 11070 Belgrade, Serbia.
  • Veinovic M; Vlatacom Institute of High Technologies, Milutina Milankovica 5, 11070 Belgrade, Serbia.
Sensors (Basel) ; 22(3)2022 Feb 08.
Article em En | MEDLINE | ID: mdl-35162038
ABSTRACT
In this paper, we present a hardware and software platform for signal processing (SPP) in long-range, multi-spectral, electro-optical systems (MSEOS). Such systems integrate various cameras such as lowlight color, medium or long-wave-infrared thermal and short-wave-infrared cameras together with other sensors such as laser range finders, radars, GPS receivers, etc. on rotational pan-tilt positioner platforms. An SPP is designed with the main goal to control all components of an MSEOS and execute complex signal processing algorithms such as video stabilization, artificial intelligence-based target detection, target tracking, video enhancement, target illumination, multi-sensory image fusion, etc. Such algorithms might be very computationally demanding, so an SPP enables them to run by splitting processing tasks between a field-programmable gate array (FPGA) unit, a multicore microprocessor (MCuP) and a graphic processing unit (GPU). Additionally, multiple SPPs can be linked together via an internal Gbps Ethernet-based network to balance the processing load. A detailed description of the SPP system and experimental results of workloads for typical algorithms on demonstrational MSEOS are given. Finally, we give remarks regarding upgrading SPPs as novel FPGAs, MCuPs and GPUs become available.
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Texto completo: 1 Coleções: 01-internacional Base de dados: MEDLINE Idioma: En Ano de publicação: 2022 Tipo de documento: Article

Texto completo: 1 Coleções: 01-internacional Base de dados: MEDLINE Idioma: En Ano de publicação: 2022 Tipo de documento: Article