Dual-Gate All-Electrical Valleytronic Transistors.
Nano Lett
; 23(1): 192-197, 2023 Jan 11.
Article
em En
| MEDLINE
| ID: mdl-36594477
ABSTRACT
The development of integrated circuits (ICs) based on a complementary metal-oxide-semiconductor through transistor scaling has reached the technology bottleneck; thus, alternative approaches from new physical mechanisms are highly demanded. Valleytronics in two-dimensional (2D) material systems has recently emerged as a strong candidate, which utilizes the valley degree of freedom to process information for electronic applications. However, for all-electrical valleytronic transistors, very low room-temperature "valley on-off" ratios (around 10) have been reported so far, which seriously limits their practical applications. In this work, we successfully illustrated both n- and p-type valleytronic transistor performances in monolayer MoS2 and WSe2 devices, with measured "valley on-off" ratios improved up to 3 orders of magnitude greater compared to previous reports. Our work shows a promising way for the electrically controllable manipulation of valley degree of freedom toward practical device applications.
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01-internacional
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MEDLINE
Idioma:
En
Ano de publicação:
2023
Tipo de documento:
Article