RESUMO
We have proposed leaky integrate-and-fire (LIF) neuron having low-energy consumption and tunable functionality without external circuit components. Our LIF neuron has a simple configuration consisting of only three components: one bandgap-engineered resistive switching transistor (BE-RST), one capacitor, and one resistor. Here, the crucial point is that BE-RST with a silicon-germanium heterojunction possesses an amplified hysteric current switching with a low latch-up voltage due to improved hole storage capability and impact ionization coefficient. Therefore, the proposed neuron utilizing BE-RST requires an energy consumption of 0.36 pJ/spike, which is approximately six times lower than 2.08 pJ/spike of pure silicon-RST based neuron. In addition, the spiking properties can be tuned by modulating the leakage rate and threshold through gate bias, which contributes to energy-efficient sparse-activity and high learning accuracy. As a result, our proposed neuron can be a promising candidate for executing various spiking neural network applications.
RESUMO
In this study, we investigated the influence of quasi-one-dimensional (Quasi-1D) characteristics on the source and drain contact resistances within vertical nanowire (NW) field-effect transistors (FETs) of diminutive diameter. The top contact of the NW is segregated into two distinct regions: the first encompassing the upper surface, designated as the axial contact, and the second encircling the side surface, known as the radial contact, which is formed during the top-contact metal deposition process. Quantum confinement effects, prominent within Quasi-1D NWs, exert significant constraints on radial transport, consequently inducing a noticeable impact on contact resistance. Notably, in the radial direction, electron tunneling occurs only through quantized, discrete energy levels. Conversely, along the axial direction, electron tunneling freely traverses continuous energy levels. In a meticulous numerical analysis, these disparities in transport mechanisms unveiled that NWs with diameters below 30 nm exhibit a markedly higher radial contact resistance compared to their axial counterparts. Furthermore, an increase in the overlap length (less than 5 nm) contributes to a modest reduction in radial resistance; however, it remains consistently higher than the axial contact resistance.
RESUMO
The simple structure, low power consumption, and small form factor have made surface acoustic wave (SAW) devices essential to mobile communication as RF filters. For instance, the latest 5G smartphones are equipped with almost 100 acoustic wave filters to select a specific frequency band and increase communication capacity. On the arrival of the newest communication standard, 5G, mm-band up to 39 GHz is supposed to be utilized, whereas the conventional SAW filters are limited to below 3 GHz, leaving a critical component missing. Here, we show an emerging 2D material-hexagonal boron nitride-can become a key enabler of mm-band SAW filter. Our study, based on first principles analysis and acousto-electric simulation, shows the operating frequency of SAW devices can reach over 20 GHz in its fundamental mode and 40 GHz in its interface mode with high electromechanical coupling coefficient (K2) and low insertion loss. In addition to the orders of magnitude improvement compared to the conventional SAW devices, our study provides a systematic approach to utilizing van der Waals crystals with highly anisotropic acoustic properties for practical applications.
RESUMO
Three-terminal (3-T) thyristor random-access memory is explored for a next-generation high-density nanoscale vertical cross-point array. The effects of standby voltages on the device are thoroughly investigated in terms of gate-cathode voltage (VGC,ST) and anode-cathode voltage (VAC,ST) in the standby state for superior data retention characteristics and low-power operation. The device with the optimized VGC,ST of - 0.4 V and VAC,ST of 0.6 V shows the continuous data retention capability without refresh operation with a low standby current of 1.14 pA. In addition, a memory array operation scheme of 3-T TRAM is proposed to address array disturbance issues. The presented array operation scheme can efficiently minimize program, erase and read disturbances on unselected cells by adjusting gate-cathode voltage. The standby voltage turns out to be beneficial to improve retention characteristics: over 10 s. With the proposed memory array operation, 3-T TRAM can provide excellent data retention characteristics and high-density memory configurations comparable with or surpass conventional dynamic random-access memory (DRAM) technology.