Tunable ion energy barrier modulation through aliovalent halide doping for reliable and dynamic memristive neuromorphic systems.

Memristive neuromorphic computing has emerged as a promising computing paradigm for the upcoming artificial intelligence era, offering low power consumption and high speed. However, its commercialization remains challenging due to reliability issues from stochastic ion movements. Here, we propose an innovative method to enhance the memristive uniformity and performance through aliovalent halide doping. By introducing fluorine concentration into dynamic TiO2-x memristors, we experimentally demonstrate reduced device variations, improved switching speeds, and enhanced switching windows. Atomistic simulations of amorphous TiO2-x reveal that fluoride ions attract oxygen vacancies, improving the reversible redistribution and uniformity. A number of migration barrier calculations statistically show that fluoride ions also reduce the migration energies of nearby oxygen vacancies, facilitating ionic diffusion and high-speed switching. The detailed Voronoi volume analysis further suggests design principles in terms of the migrating species' electrostatic repulsion and migration barriers. This work presents an innovative methodology for the fabrication of reliable memristor devices, contributing to the realization of hardware-based neuromorphic systems.

Phase-change memory via a phase-changeable self-confined nano-filament.

Phase-change memory (PCM) has been considered a promising candidate for solving von Neumann bottlenecks owing to its low latency, non-volatile memory property and high integration density1,2. However, PCMs usually require a large current for the reset process by melting the phase-change material into an amorphous phase, which deteriorates the energy efficiency2-5. Various studies have been conducted to reduce the operation current by minimizing the device dimensions, but this increases the fabrication cost while the reduction of the reset current is limited6,7. Here we show a device for reducing the reset current of a PCM by forming a phase-changeable SiTex nano-filament. Without sacrificing the fabrication cost, the developed nano-filament PCM achieves an ultra-low reset current (approximately 10 µA), which is about one to two orders of magnitude smaller than that of highly scaled conventional PCMs. The device maintains favourable memory characteristics such as a large on/off ratio, fast speed, small variations and multilevel memory properties. Our finding is an important step towards developing novel computing paradigms for neuromorphic computing systems, edge processors, in-memory computing systems and even for conventional memory applications.

Linear conductance update improvement of CMOS-compatible second-order memristors for fast and energy-efficient training of a neural network using a memristor crossbar array.

Memristors are two-terminal memory devices that can change the conductance state and store analog values. Thanks to their simple structure, suitability for high-density integration, and non-volatile characteristics, memristors have been intensively studied as synapses in artificial neural network systems. Memristive synapses in neural networks have theoretically better energy efficiency compared with conventional von Neumann computing processors. However, memristor crossbar array-based neural networks usually suffer from low accuracy because of the non-ideal factors of memristors such as non-linearity and asymmetry, which prevent weights from being programmed to their targeted values. In this article, the improvement in linearity and symmetry of pulse update of a fully CMOS-compatible HfO2-based memristor is discussed, by using a second-order memristor effect with a heating pulse and a voltage divider composed of a series resistor and two diodes. We also demonstrate that the improved device characteristics enable energy-efficient and fast training of a memristor crossbar array-based neural network with high accuracy through a realistic model-based simulation. By improving the memristor device's linearity and symmetry, our results open up the possibility of a trainable memristor crossbar array-based neural network system that possesses great energy efficiency, high area efficiency, and high accuracy at the same time.

Recent Advances and Future Prospects for Memristive Materials, Devices, and Systems.

Memristive technology has been rapidly emerging as a potential alternative to traditional CMOS technology, which is facing fundamental limitations in its development. Since oxide-based resistive switches were demonstrated as memristors in 2008, memristive devices have garnered significant attention due to their biomimetic memory properties, which promise to significantly improve power consumption in computing applications. Here, we provide a comprehensive overview of recent advances in memristive technology, including memristive devices, theory, algorithms, architectures, and systems. In addition, we discuss research directions for various applications of memristive technology including hardware accelerators for artificial intelligence, in-sensor computing, and probabilistic computing. Finally, we provide a forward-looking perspective on the future of memristive technology, outlining the challenges and opportunities for further research and innovation in this field. By providing an up-to-date overview of the state-of-the-art in memristive technology, this review aims to inform and inspire further research in this field.

Retention Secured Nonlinear and Self-Rectifying Analog Charge Trap Memristor for Energy-Efficient Neuromorphic Hardware.

A memristive crossbar array (MCA) is an ideal platform for emerging memory and neuromorphic hardware due to its high bitwise density capability. A charge trap memristor (CTM) is an attractive candidate for the memristor cell of the MCA, because the embodied rectifying characteristic frees it from the sneak current issue. Although the potential of the CTM devices has been suggested, their practical viability needs to be further proved. Here, a Pt/Ta2 O5 /Nb2 O5- x /Al2 O3- y /Ti CTM stack exhibiting high retention and array-level uniformity is proposed, allowing a highly reliable selector-less MCA. It shows high self-rectifying and nonlinear current-voltage characteristics below 1 µA of programming current with a continuous analog switching behavior. Also, its retention is longer than 105 s at 150 °C, suggesting the device is highly stable for non-volatile analog applications. A plausible band diagram model is proposed based on the electronic spectroscopy results and conduction mechanism analysis. The self-rectifying and nonlinear characteristics allow reducing the on-chip training energy consumption by 71% for the MNIST dataset training task with an optimized programming scheme.

The gate injection-based field-effect synapse transistor with linear conductance update for online training.

Neuromorphic computing, an alternative for von Neumann architecture, requires synapse devices where the data can be stored and computed in the same place. The three-terminal synapse device is attractive for neuromorphic computing due to its high stability and controllability. However, high nonlinearity on weight update, low dynamic range, and incompatibility with conventional CMOS systems have been reported as obstacles for large-scale crossbar arrays. Here, we propose the CMOS compatible gate injection-based field-effect transistor employing thermionic emission to enhance the linear conductance update. The dependence of the linearity on the conduction mechanism is examined by inserting an interfacial layer in the gate stack. To demonstrate the conduction mechanism, the gate current measurement is conducted under varying temperatures. The device based on thermionic emission achieves superior synaptic characteristics, leading to high performance on the artificial neural network simulation as 93.17% on the MNIST dataset.

Experimental demonstration of highly reliable dynamic memristor for artificial neuron and neuromorphic computing.

Neuromorphic computing, a computing paradigm inspired by the human brain, enables energy-efficient and fast artificial neural networks. To process information, neuromorphic computing directly mimics the operation of biological neurons in a human brain. To effectively imitate biological neurons with electrical devices, memristor-based artificial neurons attract attention because of their simple structure, energy efficiency, and excellent scalability. However, memristor's non-reliability issues have been one of the main obstacles for the development of memristor-based artificial neurons and neuromorphic computings. Here, we show a memristor 1R cross-bar array without transistor devices for individual memristor access with low variation, 100% yield, large dynamic range, and fast speed for artificial neuron and neuromorphic computing. Based on the developed memristor, we experimentally demonstrate a memristor-based neuron with leaky-integrate and fire property with excellent reliability. Furthermore, we develop a neuro-memristive computing system based on the short-term memory effect of the developed memristor for efficient processing of sequential data. Our neuro-memristive computing system successfully trains and generates bio-medical sequential data (antimicrobial peptides) while using a small number of training parameters. Our results open up the possibility of memristor-based artificial neurons and neuromorphic computing systems, which are essential for energy-efficient edge computing devices.

Heterogeneous and Monolithic 3D Integration of III-V-Based Radio Frequency Devices on Si CMOS Circuits.

Next-generation wireless communication such as sixth-generation (6G) and beyond is expected to require high-frequency, multifunctionality, and power-efficiency systems. A III-V compound semiconductor is a promising technology for high-frequency applications, and a Si complementary metal-oxide-semiconductor (CMOS) is the never-beaten technology for highly integrated digital circuits. To harness the advantages of these two technologies, monolithic integration of III-V and Si electronics is beneficial, so that there have been everlasting efforts to accomplish the monolithic integration. Considering that the on horizon 6G wireless communication requires faster and more energy-efficient system-on-chip technologies, it is imperative to realize a radio frequency (RF) system in which III-V technology and Si CMOS technology are integrated at a device level. Here we report heterogeneous and monolithic three-dimensional (3D) analog/RF-digital mixed-signal integrated circuits that contain two types of InGaAs high-electron-mobility transistors (HEMTs) designed for high fT and fMAX in the top and Si CMOS mixed-signal circuits consisting of an analog-to-digital converter and digital-to-analog converter in the bottom. A high unity current gain cutoff frequency of 448 GHz and unity power gain cutoff frequency of 742 GHz have been achieved by the fT oriented and fMAX oriented InGaAs HEMTs, respectively, without being affected by mixed-signal interference. At the same time, the bottom Si CMOS circuits provide valid signals without any performance degradation by the integration process.

Reliable multilevel memristive neuromorphic devices based on amorphous matrix via quasi-1D filament confinement and buffer layer.

Conductive-bridging random access memory (CBRAM) has garnered attention as a building block of non-von Neumann architectures because of scalability and parallel processing on the crossbar array. To integrate CBRAM into the back-end-of-line (BEOL) process, amorphous switching materials have been investigated for practical usage. However, both the inherent randomness of filaments and disorders of amorphous material lead to poor reliability. In this study, a highly reliable nanoporous-defective bottom layer (NP-DBL) structure based on amorphous TiO2 is demonstrated (Ag/a-TiO2/a-TiOx/p-Si). The stoichiometries of DBL and the pore size can be manipulated to achieve the analog conductance updates and multilevel conductance by 300 states with 1.3% variation, and 10 levels, respectively. Compared with nonporous TiO2 CBRAM, endurance, retention, and uniformity can be improved by 106 pulses, 28 days at 85°C, and 6.7 times, respectively. These results suggest even amorphous-based systems, elaborately tuned structural variables, can help design more reliable CBRAMs.

Nonvolatile and Neuromorphic Memory Devices Using Interfacial Traps in Two-Dimensional WSe2/MoTe2 Stack Channel.

Very recently, stacked two-dimensional materials have been studied, focusing on the van der Waals interaction at their stack junction interface. Here, we report field effect transistors (FETs) with stacked transition metal dichalcogenide (TMD) channels, where the heterojunction interface between two TMDs appears useful for nonvolatile or neuromorphic memory FETs. A few nanometer-thin WSe2 and MoTe2 flakes are vertically stacked on the gate dielectric, and bottom p-MoTe2 performs as a channel for hole transport. Interestingly, the WSe2/MoTe2 stack interface functions as a hole trapping site where traps behave in a nonvolatile manner, although trapping/detrapping can be controlled by gate voltage (VGS). Memory retention after high VGS pulse appears longer than 10000 s, and the Program/Erase ratio in a drain current is higher than 200. Moreover, the traps are delicately controllable even with small VGS, which indicates that a neuromorphic memory is also possible with our heterojunction stack FETs. Our stack channel FET demonstrates neuromorphic memory behavior of ∼94% recognition accuracy.

Conductive-bridging random-access memories for emerging neuromorphic computing.

With the increasing utilisation of artificial intelligence, there is a renewed demand for the development of novel neuromorphic computing owing to the drawbacks of the existing computing paradigm based on the von Neumann architecture. Extensive studies have been performed on memristors as their electrical nature is similar to those of biological synapses and neurons. However, most hardware-based artificial neural networks (ANNs) have been developed with oxide-based memristors owing to their high compatibility with mature complementary metal-oxide-semiconductor (CMOS) processes. Considering the advantages of conductive-bridging random-access memories (CBRAMs), such as their high scalability, high on-off current with a wide dynamic range, and low off-current, over oxide-based memristors, extensive studies on CBRAMs are required. In this review, the basics of operation of CBRAMs are examined in detail, from the formation of metal nanoclusters to filament bridging. Additionally, state-of-the-art experimental demonstrations of CBRAM-based artificial synapses and neurons are presented. Finally, CBRAM-based ANNs are discussed, including deep neural networks and spiking neural networks, along with other emerging computing applications. This review is expected to pave the way toward further development of large-scale CBRAM array systems.

SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations.

Although several types of architecture combining memory cells and transistors have been used to demonstrate artificial synaptic arrays, they usually present limited scalability and high power consumption. Transistor-free analog switching devices may overcome these limitations, yet the typical switching process they rely on-formation of filaments in an amorphous medium-is not easily controlled and hence hampers the spatial and temporal reproducibility of the performance. Here, we demonstrate analog resistive switching devices that possess desired characteristics for neuromorphic computing networks with minimal performance variations using a single-crystalline SiGe layer epitaxially grown on Si as a switching medium. Such epitaxial random access memories utilize threading dislocations in SiGe to confine metal filaments in a defined, one-dimensional channel. This confinement results in drastically enhanced switching uniformity and long retention/high endurance with a high analog on/off ratio. Simulations using the MNIST handwritten recognition data set prove that epitaxial random access memories can operate with an online learning accuracy of 95.1%.

Experimental Demonstration of Feature Extraction and Dimensionality Reduction Using Memristor Networks.

Memristors have been considered as a leading candidate for a number of critical applications ranging from nonvolatile memory to non-Von Neumann computing systems. Feature extraction, which aims to transform input data from a high-dimensional space to a space with fewer dimensions, is an important technique widely used in machine learning and pattern recognition applications. Here, we experimentally demonstrate that memristor arrays can be used to perform principal component analysis, one of the most commonly used feature extraction techniques, through online, unsupervised learning. Using Sanger's rule, that is, the generalized Hebbian algorithm, the principal components were obtained as the memristor conductances in the network after training. The network was then used to analyze sensory data from a standard breast cancer screening database with high classification success rate (97.1%).

Remote epitaxy through graphene enables two-dimensional material-based layer transfer.

Epitaxy-the growth of a crystalline material on a substrate-is crucial for the semiconductor industry, but is often limited by the need for lattice matching between the two material systems. This strict requirement is relaxed for van der Waals epitaxy, in which epitaxy on layered or two-dimensional (2D) materials is mediated by weak van der Waals interactions, and which also allows facile layer release from 2D surfaces. It has been thought that 2D materials are the only seed layers for van der Waals epitaxy. However, the substrates below 2D materials may still interact with the layers grown during epitaxy (epilayers), as in the case of the so-called wetting transparency documented for graphene. Here we show that the weak van der Waals potential of graphene cannot completely screen the stronger potential field of many substrates, which enables epitaxial growth to occur despite its presence. We use density functional theory calculations to establish that adatoms will experience remote epitaxial registry with a substrate through a substrate-epilayer gap of up to nine ångströms; this gap can accommodate a monolayer of graphene. We confirm the predictions with homoepitaxial growth of GaAs(001) on GaAs(001) substrates through monolayer graphene, and show that the approach is also applicable to InP and GaP. The grown single-crystalline films are rapidly released from the graphene-coated substrate and perform as well as conventionally prepared films when incorporated in light-emitting devices. This technique enables any type of semiconductor film to be copied from underlying substrates through 2D materials, and then the resultant epilayer to be rapidly released and transferred to a substrate of interest. This process is particularly attractive in the context of non-silicon electronics and photonics, where the ability to re-use the graphene-coated substrates allows savings on the high cost of non-silicon substrates.

Data Clustering using Memristor Networks.

Memristors have emerged as a promising candidate for critical applications such as non-volatile memory as well as non-Von Neumann computing architectures based on neuromorphic and machine learning systems. In this study, we demonstrate that memristors can be used to perform principal component analysis (PCA), an important technique for machine learning and data feature learning. The conductance changes of memristors in response to voltage pulses are studied and modeled with an internal state variable to trace the analog behavior of the device. Unsupervised, online learning is achieved in a memristor crossbar using Sanger's learning rule, a derivative of Hebb's rule, to obtain the principal components. The details of weights evolution during training is investigated over learning epochs as a function of training parameters. The effects of device non-uniformity on the PCA network performance are further analyzed. We show that the memristor-based PCA network is capable of linearly separating distinct classes from sensory data with high clarification success of 97.6% even in the presence of large device variations.

Experimental demonstration of a second-order memristor and its ability to biorealistically implement synaptic plasticity.

Memristors have been extensively studied for data storage and low-power computation applications. In this study, we show that memristors offer more than simple resistance change. Specifically, the dynamic evolutions of internal state variables allow an oxide-based memristor to exhibit Ca(2+)-like dynamics that natively encode timing information and regulate synaptic weights. Such a device can be modeled as a second-order memristor and allow the implementation of critical synaptic functions realistically using simple spike forms based solely on spike activity.

Tuning resistive switching characteristics of tantalum oxide memristors through Si doping.

An oxide memristor device changes its internal state according to the history of the applied voltage and current. The principle of resistive switching (RS) is based on ion transport (e.g., oxygen vacancy redistribution). To date, devices with bi-, triple-, or even quadruple-layered structures have been studied to achieve the desired switching behavior through device structure optimization. In contrast, the device performance can also be tuned through fundamental atomic-level design of the switching materials, which can directly affect the dynamic transport of ions and lead to optimized switching characteristics. Here, we show that doping tantalum oxide memristors with silicon atoms can facilitate oxygen vacancy formation and transport in the switching layer with adjustable ion hopping distance and drift velocity. The devices show larger dynamic ranges with easier access to the intermediate states while maintaining the extremely high cycling endurance (>10(10) set and reset) and are well-suited for neuromorphic computing applications. As an example, we demonstrate different flavors of spike-timing-dependent plasticity in this memristor system. We further provide a characterization methodology to quantitatively estimate the effective hopping distance of the oxygen vacancies. The experimental results are confirmed through detailed ab initio calculations which reveal the roles of dopants and provide design methodology for further optimization of the RS behavior.

Electrochemical dynamics of nanoscale metallic inclusions in dielectrics.

Nanoscale metal inclusions in or on solid-state dielectrics are an integral part of modern electrocatalysis, optoelectronics, capacitors, metamaterials and memory devices. The properties of these composite systems strongly depend on the size, dispersion of the inclusions and their chemical stability, and are usually considered constant. Here we demonstrate that nanoscale inclusions (for example, clusters) in dielectrics dynamically change their shape, size and position upon applied electric field. Through systematic in situ transmission electron microscopy studies, we show that fundamental electrochemical processes can lead to universally observed nucleation and growth of metal clusters, even for inert metals like platinum. The clusters exhibit diverse dynamic behaviours governed by kinetic factors including ion mobility and redox rates, leading to different filament growth modes and structures in memristive devices. These findings reveal the microscopic origin behind resistive switching, and also provide general guidance for the design of novel devices involving electronics and ionics.

Comprehensive physical model of dynamic resistive switching in an oxide memristor.

Memristors have been proposed for a number of applications from nonvolatile memory to neuromorphic systems. Unlike conventional devices based solely on electron transport, memristors operate on the principle of resistive switching (RS) based on redistribution of ions. To date, a number of experimental and modeling studies have been reported to probe the RS mechanism; however, a complete physical picture that can quantitatively describe the dynamic RS behavior is still missing. Here, we present a quantitative and accurate dynamic switching model that not only fully accounts for the rich RS behaviors in memristors in a unified framework but also provides critical insight for continued device design, optimization, and applications. The proposed model reveals the roles of electric field, temperature, oxygen vacancy concentration gradient, and different material and device parameters on RS and allows accurate predictions of diverse set/reset, analog switching, and complementary RS behaviors using only material-dependent device parameters.

Random telegraph noise and resistance switching analysis of oxide based resistive memory.

Resistive random access memory (RRAM) devices (e.g."memristors") are widely believed to be a promising candidate for future memory and logic applications. Although excellent performance has been reported, the nature of resistance switching is still under extensive debate. In this study, we perform systematic investigation of the resistance switching mechanism in a TaOx based RRAM through detailed noise analysis, and show that the resistance switching from high-resistance to low-resistance is accompanied by a semiconductor-to-metal transition mediated by the accumulation of oxygen-vacancies in the conduction path. Specifically, pronounced random-telegraph noise (RTN) with values up to 25% was observed in the device high-resistance state (HRS) but not in the low-resistance state (LRS). Through time-domain and temperature dependent analysis, we show that the RTN effect shares the same origin as the resistive switching effects, and both can be traced to the (re)distribution of oxygen vacancies (VOs). From noise and transport analysis we further obtained the density of states and average distance of the VOs at different resistance states, and developed a unified model to explain the conduction in both the HRS and the LRS and account for the resistance switching effects in these devices. Significantly, it was found that even though the conduction channel area is larger in the HRS, during resistive switching a localized region gains significantly higher VO and dominates the conduction process. These findings reveal the complex dynamics involved during resistive switching and will help guide continued optimization in the design and operation of this important emerging device class.