Role of a capping layer on the crystalline structure of Sn thin films grown at cryogenic temperatures on InSb substrates.

Metal deposition with cryogenic cooling is a common technique in the condensed matter community for producing ultra-thin epitaxial superconducting layers on semiconductors. However, a significant challenge arises when these films return to room temperature, as they tend to undergo dewetting. This issue can be mitigated by capping the films with an amorphous layer. In this study, we investigate the influence of differentin situfabricated caps on the structural characteristics of Sn thin films deposited at 80 K on InSb substrates. Regardless of the type of capping, we consistently observe that the films remain smooth upon returning to room temperature and exhibit epitaxy on InSb in the cubic Sn (α-Sn) phase. Notably, we identify a correlation between alumina capping using an electron beam evaporator and an increased presence of tetragonal Sn (ß-Sn) grains. This suggests that heating from the alumina source may induce a partial phase transition in the Sn layer. The existence of theß-Sn phase induces superconducting behavior of the films by percolation effect. This study highlights the potential for tailoring the structural properties of cryogenic Sn thin films throughin situcapping. This development opens avenues for precise control in the production of superconducting Sn films, facilitating their integration into quantum computing platforms.

Dislocation-free axial InAs-on-GaAs nanowires on silicon.

We report on the growth of axial InAs-on-GaAs nanowire heterostructures on silicon by molecular beam epitaxy using 20 nm diameter Au catalysts. First, the growth parameters of the GaAs nanowire segment were optimized to achieve a pure wurtzite crystal structure. Then, we developed a two-step growth procedure to enhance the yield of vertical InAs-on-GaAs nanowires. We achieved 90% of straight InAs-on-GaAs nanowires by further optimizing the growth parameters. We investigated the composition change at the interface by energy dispersive x-ray spectroscopy and the nanowire crystal structure by transmission electron microscopy. The composition of the nominal InAs segment is found to be In x Ga1-x As with x = 0.85 and corresponds to 6% of lattice mismatch with GaAs. Strain mapping performed by the geometrical phase analysis of high-resolution images revealed a dislocation-free GaAs/In0.85Ga0.15As interface. In conclusion, we successfully fabricated highly mismatched heterostructures, confirming the prediction that axial GaAs/In0.85Ga0.15As interfaces are pseudomorphic in nanowires with a diameter smaller than 40 nm.

From InSb nanowires to nanocubes: looking for the sweet spot.

High aspect ratios are highly desired to fully exploit the one-dimensional properties of indium antimonide nanowires. Here we systematically investigate the growth mechanisms and find parameters leading to long and thin nanowires. Variation of the V/III ratio and the nanowire density are found to have the same influence on the "local" growth conditions and can control the InSb shape from thin nanowires to nanocubes. We propose that the V/III ratio controls the droplet composition and the radial growth rate and these parameters determine the nanowire shape. A sweet spot is found for nanowire interdistances around 500 nm leading to aspect ratios up to 35. High electron mobilities up to 3.5 × 10(4) cm(2) V(-1) s(-1) enable the realization of complex spintronic and topological devices.

First-Principles Assessment of CdTe as a Tunnel Barrier at the α-Sn/InSb Interface.

Majorana zero modes, with prospective applications in topological quantum computing, are expected to arise in superconductor/semiconductor interfaces, such as ß-Sn and InSb. However, proximity to the superconductor may also adversely affect the semiconductor's local properties. A tunnel barrier inserted at the interface could resolve this issue. We assess the wide band gap semiconductor, CdTe, as a candidate material to mediate the coupling at the lattice-matched interface between α-Sn and InSb. To this end, we use density functional theory (DFT) with Hubbard U corrections, whose values are machine-learned via Bayesian optimization (BO) [ npj Computational Materials 2020, 6, 180]. The results of DFT+U(BO) are validated against angle resolved photoemission spectroscopy (ARPES) experiments for α-Sn and CdTe. For CdTe, the z-unfolding method [ Advanced Quantum Technologies 2022, 5, 2100033] is used to resolve the contributions of different kz values to the ARPES. We then study the band offsets and the penetration depth of metal-induced gap states (MIGS) in bilayer interfaces of InSb/α-Sn, InSb/CdTe, and CdTe/α-Sn, as well as in trilayer interfaces of InSb/CdTe/α-Sn with increasing thickness of CdTe. We find that 16 atomic layers (3.5 nm) of CdTe can serve as a tunnel barrier, effectively shielding the InSb from MIGS from the α-Sn. This may guide the choice of dimensions of the CdTe barrier to mediate the coupling in semiconductor-superconductor devices in future Majorana zero modes experiments.

Crystal structure transfer in core/shell nanowires.

Structure engineering is an emerging tool to control opto-electronic properties of semiconductors. Recently, control of crystal structure and the formation of a twinning superlattice have been shown for III-V nanowires. This level of control has not been obtained for Si nanowires, the most relevant material for the semiconductor industry. Here, we present an approach, in which a designed twinning superlattice with the zinc blende crystal structure or the wurtzite crystal structure is transferred from a gallium phosphide core wire to an epitaxially grown silicon shell. These materials have a difference in lattice constants of only 0.4%, which allows for structure transfer without introducing extra defects. The twinning superlattices, periodicity, and shell thickness can be tuned with great precision. Arrays of free-standing Si nanotubes are obtained by a selective wet-chemical etch of the core wire.

Generic nano-imprint process for fabrication of nanowire arrays.

A generic process has been developed to grow nearly defect-free arrays of (heterostructured) InP and GaP nanowires. Soft nano-imprint lithography has been used to pattern gold particle arrays on full 2 inch substrates. After lift-off organic residues remain on the surface, which induce the growth of additional undesired nanowires. We show that cleaning of the samples before growth with piranha solution in combination with a thermal anneal at 550 degrees C for InP and 700 degrees C for GaP results in uniform nanowire arrays with 1% variation in nanowire length, and without undesired extra nanowires. Our chemical cleaning procedure is applicable to other lithographic techniques such as e-beam lithography, and therefore represents a generic process.

Andreev molecules in semiconductor nanowire double quantum dots.

Chains of quantum dots coupled to superconductors are promising for the realization of the Kitaev model of a topological superconductor. While individual superconducting quantum dots have been explored, control of longer chains requires understanding of interdot coupling. Here, double quantum dots are defined by gate voltages in indium antimonide nanowires. High transparency superconducting niobium titanium nitride contacts are made to each of the dots in order to induce superconductivity, as well as probe electron transport. Andreev bound states induced on each of dots hybridize to define Andreev molecular states. The evolution of these states is studied as a function of charge parity on the dots, and in magnetic field. The experiments are found in agreement with a numerical model.Quantum dots in a nanowire are one possible approach to creating a solid-state quantum simulator. Here, the authors demonstrate the coupling of electronic states in a double quantum dot to form Andreev molecule states; a potential building block for longer chains suitable for quantum simulation.

Experimental phase diagram of zero-bias conductance peaks in superconductor/semiconductor nanowire devices.

Topological superconductivity is an exotic state of matter characterized by spinless p-wave Cooper pairing of electrons and by Majorana zero modes at the edges. The first signature of topological superconductivity is a robust zero-bias peak in tunneling conductance. We perform tunneling experiments on semiconductor nanowires (InSb) coupled to superconductors (NbTiN) and establish the zero-bias peak phase in the space of gate voltage and external magnetic field. Our findings are consistent with calculations for a finite-length topological nanowire and provide means for Majorana manipulation as required for braiding and topological quantum bits.

Growth and optical properties of axial hybrid III-V/silicon nanowires.

Hybrid silicon nanowires with an integrated light-emitting segment can significantly advance nanoelectronics and nanophotonics. They would combine transport and optical characteristics in a nanoscale device, which can operate in the fundamental single-electron and single-photon regime. III-V materials, such as direct bandgap gallium arsenide, are excellent candidates for such optical segments. However, interfacing them with silicon during crystal growth is a major challenge, because of the lattice mismatch, different expansion coefficients and the formation of antiphase boundaries. Here we demonstrate a silicon nanowire with an integrated gallium-arsenide segment. We precisely control the catalyst composition and surface chemistry to obtain dislocation-free interfaces. The integration of gallium arsenide of high optical quality with silicon is enabled by short gallium phosphide buffers. We anticipate that such hybrid silicon/III-V nanowires open practical routes for quantum information devices, where for instance electronic and photonic quantum bits are manipulated in a III-V segment and stored in a silicon section.

Bright single-photon sources in bottom-up tailored nanowires.

The ability to achieve near-unity light-extraction efficiency is necessary for a truly deterministic single-photon source. The most promising method to reach such high efficiencies is based on embedding single-photon emitters in tapered photonic waveguides defined by top-down etching techniques. However, light-extraction efficiencies in current top-down approaches are limited by fabrication imperfections and etching-induced defects. The efficiency is further tempered by randomly positioned off-axis quantum emitters. Here we present perfectly positioned single quantum dots on the axis of a tailored nanowire waveguide using bottom-up growth. In comparison to quantum dots in nanowires without waveguides, we demonstrate a 24-fold enhancement in the single-photon flux, corresponding to a light-extraction efficiency of 42%. Such high efficiencies in one-dimensional nanowires are promising to transfer quantum information over large distances between remote stationary qubits using flying qubits within the same nanowire p-n junction.

Controlling the directional emission of light by periodic arrays of heterostructured semiconductor nanowires.

We demonstrate experimentally the directional emission of light by InAsP segments embedded in InP nanowires. The nanowires are arranged in a periodic array, forming a 2D photonic crystal slab. The directionality of the emission is interpreted in terms of the preferential decay of the photoexcited nanowires and the InAsP segments into Bloch modes of the periodic structure. By simulating the emission of arrays of nanowires with the emitting segments located at different heights, we conclude that the position of this active region strongly influences the directionality and efficiency of the emission. Our results will help to improve the design of nanowire based LEDs and single photon sources.