Reliable synaptic plasticity of InGaZnO transistor with TiO2interlayer.

We demonstrate an InGaZnO (IGZO)-based synaptic transistor with a TiO2buffer layer. The structure of the synaptic transistor with TiO2inserted between the Ti metal electrode and an IGZO semiconductor channel O2trapping layer produces a large hysteresis window, which is crucial for achieving synaptic functionality. The Ti/TiO2/IGZO synaptic transistor exhibits reliable synaptic plasticity features such as excitatory post-synaptic current, paired-pulse facilitation, and potentiation and depression, originating from the reversible charge trapping and detrapping in the TiO2layer. Finally, the pattern recognition accuracy of Modified National Institute of Standards and Technology handwritten digit images was modeled using CrossSim simulation software. The simulation results present a high image recognition accuracy of ∼89%. Therefore, this simple approach using an oxide buffer layer can aid the implementation of high-performance synaptic devices for neuromorphic computing systems.

A Comprehensive Large Signal, Small Signal, and Noise Model for IGZO Thin Film Transistor Circuits.

We report a new physics-based model for dual-gate amorphous-indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) which we developed and fine-tuned through experimental implementation and benchtop characterization. We fabricated and characterized a variety of test patterns, including a-IGZO TFTs with varying gate widths (100-1000 µm) and channel lengths (5-50 µm), transmission-line-measurement patterns and ground-signal-ground (GSG) radio frequency (RF) patterns. We modeled the contact resistance as a function of bias, channel area, and temperature, and captured all operating regimes, used physics-based modeling adjusted for empirical data to capture the TFT characteristics including ambipolar subthreshold currents, graded interbias-regime current changes, threshold and flat-band voltages, the interface trap density, the gate leakage currents, the noise, and the relevant small signal parameters. To design high-precision circuits for biosensing, we validated the dc, small signal, and noise characteristics of the model. We simulated and fabricated a two-stage common source amplifier circuit with a common drain output buffer and compared the measured and simulated gain and phase performance, finding an excellent fit over a frequency range spanning 10 kHz-10 MHz.

The dual-detection mode and improved photoresponse of IGZO-based photodetectors by interfacing with water-soluble biomaterials.

The use of conventional fabrication methods rapidly developed the performance and notable enhancements of optoelectronic devices. However, it proved challenging to develop and demonstrate stable optoelectronic devices with biodegradability and biocompatibility properties towards sustainable development and extensive applications. This study incorporates a water-soluble Cr-phycoerythrin (Cr-PE) biomaterial to observe its optical and electronic properties effects on the pristine indium gallium zinc oxide (IGZO)-based photodetector. The fabricated photodetector demonstrates an extended absorption detection region, enhanced optoelectronic performance, and switchable function properties. The resulting photocurrent and responsivity of the IGZO/Cr-PE structure have increased by 5.7 and 7.1 times as compared to the pristine IGZO photodetector. It was also observed that the photodetector could operate in UV and UV-visible with enhanced optical properties by effectively adding the water-soluble Cr-PE. Also, the sensing region of IGZO photodetector becomes changeable. It exhibits switchable dual detection by alternatively dripping and removing the Cr-PE on the IGZO layer. Different measurement parameters such as detectivity, repeatability, and sensitivity are highlighted to effectively prove the advantage of including Cr-PE on the photodetector structure. This study contributes to understanding the potential functions in improving optoelectronic devices through an environmental-friendly method.

Improving Device Characteristics of Dual-Gate IGZO Thin-Film Transistors with Ar-O2 Mixed Plasma Treatment and Rapid Thermal Annealing.

In this study, high-performance indium-gallium-zinc oxide thin-film transistors (IGZO TFTs) with a dual-gate (DG) structure were manufactured using plasma treatment and rapid thermal annealing (RTA). Atomic force microscopy measurements showed that the surface roughness decreased upon increasing the O2 ratio from 16% to 33% in the argon-oxygen plasma treatment mixture. Hall measurement results showed that both the thin-film resistivity and carrier Hall mobility of the Ar-O2 plasma-treated IGZO thin films increased with the reduction of the carrier concentration caused by the decrease in the oxygen vacancy density; this was also verified using X-ray photoelectron spectroscopy measurements. IGZO thin films treated with Ar-O2 plasma were used as channel layers for fabricating DG TFT devices. These DG IGZO TFT devices were subjected to RTA at 100 °C-300 °C for improving the device characteristics; the field-effect mobility, subthreshold swing, and ION/IOFF current ratio of the 33% O2 plasma-treated DG TFT devices improved to 58.8 cm2/V·s, 0.12 V/decade, and 5.46 × 108, respectively. Long-term device stability reliability tests of the DG IGZO TFTs revealed that the threshold voltage was highly stable.

Preparation and Properties of Crystalline IGZO Thin Films.

IGZO thin films can be used as active layers of thin-film transistors and have been widely studied. However, amorphous indium gallium zinc oxide (IGZO) fabricated at room temperature is vulnerable in subsequent manufacturing processes, such as etching and sputtering; this limits IGZO thin film transistors' (TFTs) use in commercial products. In this paper, we prepared a c-axis crystallized IGZO thin film by Radio Frequency (RF) sputtering at 180 °C, with a 50% O2 ratio and 110 W power. XRD images show that the crystallized film has an obvious diffraction peak near 31°, and the spacing between the crystal surfaces was calculated to be ≈0.29 nm. The HRTEM map confirmed the above results. The stability of IGZO thin films was investigated by etching them with an acid solution. The crystalline IGZO films exhibited better acid corrosion resistance, and their anticorrosion performance was 74% higher than that of amorphous IGZO (a-IGZO) films, indicating the crystalline IGZO film can provide more stable performance in applications.

Scalable Electronic Ratchet with Over 10% Rectification Efficiency.

Electronic ratchets use a periodic potential with broken inversion symmetry to rectify undirected (electromagnetic, EM) forces and can in principle be a complement to conventional diode-based designs. Unfortunately, ratchet devices reported to date have low or undetermined power conversion efficiencies, hampering applicability. Combining experiments and numerical modeling, field-effect transistor-based ratchets are investigated in which the driving signal is coupled into the accumulation layer via interdigitated finger electrodes that are capacitively coupled to the field effect transistor channel region. The output current-voltage curves of these ratchets can have a fill factor >> 0.25 which is highly favorable for the power output. Experimentally, a maximum power conversion efficiency well over 10% at 5 MHz, which is the highest reported value for an electronic ratchet, is determined. Device simulations indicate this number can be increased further by increasing the device asymmetry. A scaling analysis shows that the frequency range of optimal performance can be scaled to the THz regime, and possibly beyond, while adhering to technologically realistic parameters. Concomitantly, the power output density increases from ≈4 W m-2 to ≈1 MW m-2. Hence, this type of ratchet device can rectify high-frequency EM fields at reasonable efficiencies, potentially paving the way for actual use as energy harvester.

Improved electrical performance of a sol-gel IGZO transistor with high-k Al2O3 gate dielectric achieved by post annealing.

We have explored the effect of post-annealing on the electrical properties of an indium gallium zinc oxide (IGZO) transistor with an Al2O3 bottom gate dielectric, formed by a sol-gel process. The post-annealed IGZO device demonstrated improved electrical performance in terms of threshold variation, on/off ratio, subthreshold swing, and mobility compared to the non-annealed reference device. Capacitance-voltage measurement confirmed that annealing can lead to enhanced capacitance properties due to reduced charge trapping. Depth profile analysis using X-ray photoelectron spectroscopy proved that percentage of both the oxygen vacancy (VO) and the hydroxyl groups (M-OH) within the IGZO/Al2O3 layers, which serve as a charge trapping source, can be substantially reduced by annealing the fabricated transistor device. Furthermore, the undesired degradation of the contact interface between source/drain electrode and the channel, which mainly concerns VO, can be largely prevented by post-annealing. Thus, the facile annealing process also improves the electrical bias stress stability. This simple post annealing approach provides a strategy for realising better performance and reliability of the solid sol-gel oxide transistor.

Cyclical Annealing Technique To Enhance Reliability of Amorphous Metal Oxide Thin Film Transistors.

This study introduces a cyclical annealing technique that enhances the reliability of amorphous indium-gallium-zinc-oxide (a-IGZO) via-type structure thin film transistors (TFTs). By utilizing this treatment, negative gate-bias illumination stress (NBIS)-induced instabilities can be effectively alleviated. The cyclical annealing provides several cooling steps, which are exothermic processes that can form stronger ionic bonds. An additional advantage is that the total annealing time is much shorter than when using conventional long-term annealing. With the use of cyclical annealing, the reliability of the a-IGZO can be effectively optimized, and the shorter process time can increase fabrication efficiency.

Teflon/SiO2 Bilayer Passivation for Improving the Electrical Reliability of Oxide TFTs Fabricated Using a New Two-Photomask Self-Alignment Process.

This study proposes a two-photomask process for fabricating amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) that exhibit a self-aligned structure. The fabricated TFTs, which lack etching-stop (ES) layers, have undamaged a-IGZO active layers that facilitate superior performance. In addition, we demonstrate a bilayer passivation method that uses a polytetrafluoroethylene (Teflon) and SiO2 combination layer for improving the electrical reliability of the fabricated TFTs. Teflon was deposited as a buffer layer through thermal evaporation. The Teflon layer exhibited favorable compatibility with the underlying IGZO channel layer and effectively protected the a-IGZO TFTs from plasma damage during SiO2 deposition, resulting in a negligible initial performance drop in the a-IGZO TFTs. Compared with passivation-free a-IGZO TFTs, passivated TFTs exhibited superior stability even after 168 h of aging under ambient air at 95% relative humidity.