RESUMO
Conventional transistors have long emphasized signal modulation and amplification, often sidelining polarity considerations. However, the recent emergence of negative differential transconductance, characterized by a drain current decline during gate voltage sweeping, has illuminated an unconventional path in transistor technology. This phenomenon promises to simplify the implementation of ternary logic circuits and enhance energy efficiency, especially in multivalued logic applications. Our research has culminated in the development of a sophisticated mixed transconductance transistor (M-T device) founded on a precise Te and IGZO heterojunction. The M-T device exhibits a sequence of intriguing phenomena, zero differential transconductance (ZDT), positive differential transconductance (PDT), and negative differential transconductance (NDT) contingent on applied gate voltage. We clarify its operation using a three-segment equivalent circuit model and validate its viability with IGZO TFT, Te TFT, and Te/IGZO TFT components. In a concluding demonstration, the M-T device interconnected with Te TFT achieves a ternary inverter with an intermediate logic state. Remarkably, this configuration seamlessly transitions into a binary inverter when it is exposed to light.