An Atomically Resolved Schottky Barrier Height Approach for Bridging the Gap between Theory and Experiment at Metal-Semiconductor Heterojunctions.

We propose an atomically resolved approach to capture the spatial variations of the Schottky barrier height (SBH) at metal-semiconductor heterojunctions. This proposed scheme, based on atom-specific partial density of states (PDOS) calculations, further enables calculation of the effective SBH that aligns with conductance measurements. We apply this approach to study the variations of SBH at MoS2@Au heterojunctions, in which MoS2 contains conducting and semiconducting grain boundaries (GBs). Our results reveal that there are significant variations in SBH at atoms in the defected heterojunctions. Of particular interest is the fact that the SBH in some areas with extended defects approaches zero, indicating Ohmic contact. One important implication of this finding is that the effective SBH should be intrinsically dependent on the defect density and character. Remarkably, the obtained effective SBH values demonstrate good agreement with existing experimental measurements. Thus, the present study addresses two long-standing challenges associated with SBH in MoS2-metal heterojunctions: the wide variation in experimentally measured SBH values at MoS2@metal heterojunctions and the large discrepancy between density-functional-theory-predicted and experimentally measured SBH values. Our proposed approach points out a valuable pathway for understanding and manipulating SBHs at metal-semiconductor heterojunctions.

Physical reservoirs based on MoS2-HZO integrated ferroelectric field-effect transistors for reservoir computing systems.

Reservoir computing (RC), a variant of recurrent neural networks (RNNs), is well-known for its reduced energy consumption through exclusive focus on training the output weight and its superior performance in handling spatiotemporal information. Implementing these networks in hardware requires devices with superior fading memory behavior. Unlike filament-based two-terminal devices, those relying on ferroelectric switching demonstrate improved voltage reliability, while three-terminal transistors provide additional active control. HfO2-based ferroelectric materials such as Hf0.5Zr0.5O2 (HZO), have garnered attention for their scalability and seamless integration with CMOS technology. This study implements a RC hardware based on MoS2-HZO integrated device structure with enhanced spontaneous polarization field. By adjusting the oxygen vacancy concentration, the devices exhibit consistent responses to both identical and nonidentical voltages, making them suitable for diverse RC applications. The high accuracy of MNIST handwritten digits recognition highlights the rich reservoir states of the traditional RC architecture. Additionally, the impact of masks on RC implementation is assessed, showcasing the device's capability for spatiotemporal signal analysis. This development paves the way for implementing energy-efficient and high-performance computing solutions.

Hardware implementation of memristor-based artificial neural networks.

Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units operating in parallel. The low communication bandwidth between memory and processing units in conventional von Neumann machines does not support the requirements of emerging applications that rely extensively on large sets of data. More recent computing paradigms, such as high parallelization and near-memory computing, help alleviate the data communication bottleneck to some extent, but paradigm- shifting concepts are required. Memristors, a novel beyond-complementary metal-oxide-semiconductor (CMOS) technology, are a promising choice for memory devices due to their unique intrinsic device-level properties, enabling both storing and computing with a small, massively-parallel footprint at low power. Theoretically, this directly translates to a major boost in energy efficiency and computational throughput, but various practical challenges remain. In this work we review the latest efforts for achieving hardware-based memristive artificial neural networks (ANNs), describing with detail the working principia of each block and the different design alternatives with their own advantages and disadvantages, as well as the tools required for accurate estimation of performance metrics. Ultimately, we aim to provide a comprehensive protocol of the materials and methods involved in memristive neural networks to those aiming to start working in this field and the experts looking for a holistic approach.

Recent Advances in In-Memory Computing: Exploring Memristor and Memtransistor Arrays with 2D Materials.

The conventional computing architecture faces substantial challenges, including high latency and energy consumption between memory and processing units. In response, in-memory computing has emerged as a promising alternative architecture, enabling computing operations within memory arrays to overcome these limitations. Memristive devices have gained significant attention as key components for in-memory computing due to their high-density arrays, rapid response times, and ability to emulate biological synapses. Among these devices, two-dimensional (2D) material-based memristor and memtransistor arrays have emerged as particularly promising candidates for next-generation in-memory computing, thanks to their exceptional performance driven by the unique properties of 2D materials, such as layered structures, mechanical flexibility, and the capability to form heterojunctions. This review delves into the state-of-the-art research on 2D material-based memristive arrays, encompassing critical aspects such as material selection, device performance metrics, array structures, and potential applications. Furthermore, it provides a comprehensive overview of the current challenges and limitations associated with these arrays, along with potential solutions. The primary objective of this review is to serve as a significant milestone in realizing next-generation in-memory computing utilizing 2D materials and bridge the gap from single-device characterization to array-level and system-level implementations of neuromorphic computing, leveraging the potential of 2D material-based memristive devices.

Coupled Ferroelectric-Photonic Memory in a Retinomorphic Hardware for In-Sensor Computing.

The development of all-in-one devices for artificial visual systems offers an attractive solution in terms of energy efficiency and real-time processing speed. In recent years, the proliferation of smart sensors in the growth of Internet-of-Things (IoT) has led to the increasing importance of in-sensor computing technology, which places computational power at the edge of the data-flow architecture. In this study, a prototype visual sensor inspired by the human retina is proposed, which integrates ferroelectricity and photosensitivity in two-dimensional (2D) α-In2Se3 material. This device mimics the functions of photoreceptors and amacrine cells in the retina, performing optical reception and memory computation functions through the use of electrical switching polarization in the channel. The gate-tunable linearity of excitatory and inhibitory functions in photon-induced short-term plasticity enables to encode and classify 12 000 images in the Mixed National Institute of Standards and Technology (MNIST) dataset with remarkable accuracy, achieving ≈94%. Additionally, in-sensor convolution image processing through a network of phototransistors, with five convolutional kernels electrically pre-programmed into the transistors is demonstrated. The convoluted photocurrent matrices undergo straightforward arithmetic calculations to produce edge and feature-enhanced scenarios. The findings demonstrate the potential of ferroelectric α-In2Se3 for highly compact and efficient retinomorphic hardware implementation, regardless of ambipolar transport in the channel.

Technology and Integration Roadmap for Optoelectronic Memristor.

Optoelectronic memristors (OMs) have emerged as a promising optoelectronic Neuromorphic computing paradigm, opening up new opportunities for neurosynaptic devices and optoelectronic systems. These OMs possess a range of desirable features including minimal crosstalk, high bandwidth, low power consumption, zero latency, and the ability to replicate crucial neurological functions such as vision and optical memory. By incorporating large-scale parallel synaptic structures, OMs are anticipated to greatly enhance high-performance and low-power in-memory computing, effectively overcoming the limitations of the von Neumann bottleneck. However, progress in this field necessitates a comprehensive understanding of suitable structures and techniques for integrating low-dimensional materials into optoelectronic integrated circuit platforms. This review aims to offer a comprehensive overview of the fundamental performance, mechanisms, design of structures, applications, and integration roadmap of optoelectronic synaptic memristors. By establishing connections between materials, multilayer optoelectronic memristor units, and monolithic optoelectronic integrated circuits, this review seeks to provide insights into emerging technologies and future prospects that are expected to drive innovation and widespread adoption in the near future.

Reliable Memristor Crossbar Array Based on 2D Layered Nickel Phosphorus Trisulfide for Energy-Efficient Neuromorphic Hardware.

Designing reliable and energy-efficient memristors for artificial synaptic arrays in neuromorphic computing beyond von Neumann architecture remains a challenge. Here, memristors based on emerging layered nickel phosphorus trisulfide (NiPS3 ) are reported that exhibit several favorable characteristics, including uniform bipolar nonvolatile switching with small operating voltage (<1 V), fast switching speed (< 20 ns), high On/Off ratio (>102 ), and the ability to achieve programmable multilevel resistance states. Through direct experimental evidence using transmission electron microscopy and energy dispersive X-ray spectroscopy, it is revealed that the resistive switching mechanism in the Ti/NiPS3 /Au device is related to the formation and dissolution of Ti conductive filaments. Intriguingly, further investigation into the microstructural and chemical properties of NiPS3 suggests that the penetration of Ti ions is accompanied by the drift of phosphorus-sulfur ions, leading to induced P/S vacancies that facilitate the formation of conductive filaments. Furthermore, it is demonstrated that the memristor, when operating in quasi-reset mode, effectively emulates long-term synaptic weight plasticity. By utilizing a crossbar array, multipattern memorization and multiply-and-accumulate (MAC) operations are successfully implemented. Moreover, owing to the highly linear and symmetric multiple conductance states, a high pattern recognition accuracy of ≈96.4% is demonstrated in artificial neural network simulation for neuromorphic systems.

Sublimation-based wafer-scale monolayer WS2 formation via self-limited thinning of few-layer WS2.

Atomically-thin monolayer WS2 is a promising channel material for next-generation Moore's nanoelectronics owing to its high theoretical room temperature electron mobility and immunity to short channel effect. The high photoluminescence (PL) quantum yield of the monolayer WS2 also makes it highly promising for future high-performance optoelectronics. However, the difficulty in strictly growing monolayer WS2, due to its non-self-limiting growth mechanism, may hinder its industrial development because of the uncontrollable growth kinetics in attaining the high uniformity in thickness and property on the wafer-scale. In this study, we report a scalable process to achieve a 4 inch wafer-scale fully-covered strictly monolayer WS2 by applying the in situ self-limited thinning of multilayer WS2 formed by sulfurization of WOx films. Through a pulsed supply of sulfur precursor vapor under a continuous H2 flow, the self-limited thinning process can effectively trim down the overgrown multilayer WS2 to the monolayer limit without damaging the remaining bottom WS2 monolayer. Density functional theory (DFT) calculations reveal that the self-limited thinning arises from the thermodynamic instability of the WS2 top layers as opposed to a stable bottom monolayer WS2 on sapphire above a vacuum sublimation temperature of WS2. The self-limited thinning approach overcomes the intrinsic limitation of conventional vapor-based growth methods in preventing the 2nd layer WS2 domain nucleation/growth. It also offers additional advantages, such as scalability, simplicity, and possibility for batch processing, thus opening up a new avenue to develop a manufacturing-viable growth technology for the preparation of a strictly-monolayer WS2 on the wafer-scale.

Attack Resilient True Random Number Generators Using Ferroelectric-Enhanced Stochasticity in 2D Transistor.

By harnessing the physically unclonable properties, true random number generators (TRNGs) offer significant promises to alleviate security concerns by generating random bitstreams that are cryptographically secured. However, fundamental challenges remain as conventional hardware often requires complex circuitry design, showing a predictable pattern that is susceptible to machine learning attacks. Here, a low-power self-corrected TRNG is presented by exploiting the stochastic ferroelectric switching and charge trapping in molybdenum disulfide (MoS2 ) ferroelectric field-effect transistors (Fe-FET) based on hafnium oxide complex. The proposed TRNG exhibits enhanced stochastic variability with near-ideal entropy of ≈1.0, Hamming distance of ≈50%, independent autocorrelation function, and reliable endurance cycle against temperature variations. Furthermore, its unpredictable feature is systematically examined by machine learning attacks, namely the predictive regression model and the long-short-term-memory (LSTM) approach, where nondeterministic predictions can be concluded. Moreover, the generated cryptographic keys from the circuitry successfully pass the National Institute of Standards and Technology (NIST) 800-20 statistical test suite. The potential of integrating ferroelectric and 2D materials is highlighted for advanced data encryption, offering a novel alternative to generate truly random numbers.

Van der Waals Layer Transfer of 2D Materials for Monolithic 3D Electronic System Integration: Review and Outlook.

Two-dimensional materials (2DMs) have attracted a great deal of interest due to their immense potential for scientific breakthroughs and technological innovations. While some 2D transition metal dichalcogenides (TMDC) such as MoS2 and WS2 are considered as the ultimate channel materials in unltrascaled transistors as replacements for Si, there has also been increasing interest in the monolithic 3D integration of 2DMs on the Si CMOS platform or in flexible electronics as back-end-of-line transistors, memory devices/selectors, and sensors, taking advantage of 2DM properties such as a high current driving capability with low leakage current, nonvolatile switching characteristics, a large surface-to-volume ratio, and a tunable bandgap. However, the realization of both of these scenarios critically depends on the development of manufacturing-viable high-yield 2DM layers transfer from the growth substrate to the Si, since the growth of high-quality 2DM layers often requires a high-temperature growth process on template substrates. Motivated by this, extensive efforts have been made by the 2DM research community to develop various 2DM layer transfer methods, leveraging the van der Waals transfer capability of the layer-structured 2DMs. These efforts have led to a number of successful demonstrations of wafer-scale 2D TMDC layer transfer, while 2DM-enabled template growth/transfer of some functional bulk materials such as III-V, Ge, and AlN has also been demonstrated. This review surveys and compares different 2DM transfer methods developed recently, with a focus on large-area 2D TMDC film transfer along with an introduction of 2DM template-assisted van der Waals growth/transfer of non-2D thin films. We will also briefly present an outlook of our envisioned multifunctionalities in 3D integrated electronic systems enabled by monolithic 3D integration of 2DMs and III-V via van der Waals transfer and discuss possible technology options for overcoming remaining challenges.

A MoS2 Hafnium Oxide Based Ferroelectric Encoder for Temporal-Efficient Spiking Neural Network.

Spiking neural network (SNN), where the information is evaluated recurrently through spikes, has manifested significant promises to minimize the energy expenditure in data-intensive machine learning and artificial intelligence. Among these applications, the artificial neural encoders are essential to convert the external stimuli to a spiking format that can be subsequently fed to the neural network. Here, a molybdenum disulfide (MoS2 ) hafnium oxide-based ferroelectric encoder is demonstrated for temporal-efficient information processing in SNN. The fast domain switching attribute associated with the polycrystalline nature of hafnium oxide-based ferroelectric material is exploited for spike encoding, rendering it suitable for realizing biomimetic encoders. Accordingly, a high-performance ferroelectric encoder is achieved, featuring a superior switching efficiency, negligible charge trapping effect, and robust ferroelectric response, which successfully enable a broad dynamic range. Furthermore, an SNN is simulated to verify the precision of the encoded information, in which an average inference accuracy of 95.14% can be achieved, using the Modified National Insitute of Standards and Technology (MNIST) dataset for digit classification. Moreover, this ferroelectric encoder manifests prominent resilience against noise injection with an overall prediction accuracy of 94.73% under various Gaussian noise levels, showing practical promises to reduce the computational load for the neural network.

The effects of point defect type, location, and density on the Schottky barrier height of Au/MoS2 heterojunction: a first-principles study.

Using DFT calculations, we investigate the effects of the type, location, and density of point defects in monolayer MoS2 on electronic structures and Schottky barrier heights (SBH) of Au/MoS2 heterojunction. Three types of point defects in monolayer MoS2, that is, S monovacancy, S divacancy and MoS (Mo substitution at S site) antisite defects, are considered. The following findings are revealed: (1) The SBH for the monolayer MoS2 with these defects is universally higher than that for its defect-free counterpart. (2) S divacancy and MoS antisite defects increase the SBH to a larger extent than S monovacancy. (3) A defect located in the inner sublayer of MoS2, which is adjacent to Au substrate, increases the SBH to a larger extent than that in the outer sublayer of MoS2. (4) An increase in defect density increases the SBH. These findings indicate a large variation of SBH with the defect type, location, and concentration. We also compare our results with previously experimentally measured SBH for Au/MoS2 contact and postulate possible reasons for the large differences among existing experimental measurements and between experimental measurements and theoretical predictions. The findings and insights revealed here may provide practical guidelines for modulation and optimization of SBH in Au/MoS2 and similar heterojunctions via defect engineering.

Interface-Modulated Resistive Switching in Mo-Irradiated ReS2 for Neuromorphic Computing.

Coupling charge impurity scattering effects and charge-carrier modulation by doping can offer intriguing opportunities for atomic-level control of resistive switching (RS). Nonetheless, such effects have remained unexplored for memristive applications based on 2D materials. Here a facile approach is reported to transform an RS-inactive rhenium disulfide (ReS2 ) into an effective switching material through interfacial modulation induced by molybdenum-irradiation (Mo-i) doping. Using ReS2 as a model system, this study unveils a unique RS mechanism based on the formation/dissolution of metallic ß-ReO2 filament across the defective ReS2 interface during the set/reset process. Through simple interfacial modulation, ReS2 of various thicknesses are switchable by modulating the Mo-irradiation period. Besides, the Mo-irradiated ReS2 (Mo-ReS2 ) memristor further exhibits a bipolar non-volatile switching ratio of nearly two orders of magnitude, programmable multilevel resistance states, and long-term synaptic plasticity. Additionally, the fabricated device can achieve a high MNIST learning accuracy of 91% under a non-identical pulse train. The study's findings demonstrate the potential for modulating RS in RS-inactive 2D materials via the unique doping-induced charged impurity scattering property.

In-Memory Computing using Memristor Arrays with Ultrathin 2D PdSeOx /PdSe2 Heterostructure.

In-memory computing based on memristor arrays holds promise to address the speed and energy issues of the classical von Neumann computing system. However, the stochasticity of ions' transport in conventional oxide-based memristors imposes severe intrinsic variability, which compromises learning accuracy and hinders the implementation of neural network hardware accelerators. Here, these challenges are addressed using a low-voltage memristor array based on an ultrathin PdSeOx /PdSe2 heterostructure switching medium realized by a controllable ultraviolet (UV)-ozone treatment. A distinctively different ions' transport mechanism is revealed in the heterostructure that can confine the formation of conductive filaments, leading to a remarkable uniform switching with low set and reset voltage variability values of 4.8% and -3.6%, respectively. Moreover, convolutional image processing is further implemented using various crossbar kernels that achieve a high recognition accuracy of ≈93.4% due to the highly linear and symmetric analog weight update as well as multiple conductance states, manifesting its potential beyond von Neumann computing.

Wafer-Scale 2D Hafnium Diselenide Based Memristor Crossbar Array for Energy-Efficient Neural Network Hardware.

Memristor crossbar with programmable conductance could overcome the energy consumption and speed limitations of neural networks when executing core computing tasks in image processing. However, the implementation of crossbar array (CBA) based on ultrathin 2D materials is hindered by challenges associated with large-scale material synthesis and device integration. Here, a memristor CBA is demonstrated using wafer-scale (2-inch) polycrystalline hafnium diselenide (HfSe2 ) grown by molecular beam epitaxy, and a metal-assisted van der Waals transfer technique. The memristor exhibits small switching voltage (0.6 V), low switching energy (0.82 pJ), and simultaneously achieves emulation of synaptic weight plasticity. Furthermore, the CBA enables artificial neural network with a high recognition accuracy of 93.34%. Hardware multiply-and-accumulate (MAC) operation with a narrow error distribution of 0.29% is also demonstrated, and a high power efficiency of greater than 8-trillion operations per second per Watt is achieved. Based on the MAC results, hardware convolution image processing can be performed using programmable kernels (i.e., soft, horizontal, and vertical edge enhancement), which constitutes a vital function for neural network hardware.

Gate-Defined Quantum Confinement in CVD 2D WS2.

Temperature-dependent transport measurements are performed on the same set of chemical vapor deposition (CVD)-grown WS2 single- and bilayer devices before and after atomic layer deposition (ALD) of HfO2 . This isolates the influence of HfO2 deposition on low-temperature carrier transport and shows that carrier mobility is not charge impurity limited as commonly thought, but due to another important but commonly overlooked factor: interface roughness. This finding is corroborated by circular dichroic photoluminescence spectroscopy, X-ray photoemission spectroscopy, cross-sectional scanning transmission electron microscopy, carrier-transport modeling, and density functional modeling. Finally, electrostatic gate-defined quantum confinement is demonstrated using a scalable approach of large-area CVD-grown bilayer WS2 and ALD-grown HfO2 . The high dielectric constant and low leakage current enabled by HfO2 allows an estimated quantum dot size as small as 58 nm. The ability to lithographically define increasingly smaller devices is especially important for transition metal dichalcogenides due to their large effective masses, and should pave the way toward their use in quantum information processing applications.

Suspended MoS2 Photodetector Using Patterned Sapphire Substrate.

The introduction of patterned sapphire substrates (PSS) has been regarded as an effective method to improve the photoelectric performance of 2D layered materials in recent years. Molybdenum disulfide (MoS2 ), an intriguing transition metal 2D materials with splendid photoresponse owing to a direct-indirect bandgap transition at monolayer, shows promising optoelectronics applications. Here, a large-scale, continuous multilayer MoS2 film is prepared on a SiO2 /Si substrate and transferred to flat sapphire substrate and PSS, respectively. An enhanced dynamic distribution of local electric field and concentrated photon excitons across the interface between MoS2 and patterned sapphire substrates are revealed by the finite-difference time-domain simulation. The photoelectric performance of the MoS2 /PSS photodetector is improved under the three lasers of 365, 460, and 660 nm. Under the 365 nm laser, the photocurrent increased by 3 times, noise equivalent power (NEP) decreases to 1.77 × 10-14 W/Hz1/2 and specific detectivity (D*) increases to 1.2 × 1010 Jones. Meanwhile, the responsivity is increased by 7 times at 460 nm, and the response time of the MoS2 /PSS photodetector is also shortened under three wavelengths. The work demonstrates an effective method for enhancing the optical properties of photodetectors and enabling simultaneous detection of broad-spectrum emissions.

Self-Selective Multi-Terminal Memtransistor Crossbar Array for In-Memory Computing.

Two-terminal resistive switching devices are commonly plagued with longstanding scientific issues including interdevice variability and sneak current that lead to computational errors and high-power consumption. This necessitates the integration of a separate selector in a one-transistor-one-RRAM (1T-1R) configuration to mitigate crosstalk issue, which compromises circuit footprint. Here, we demonstrate a multi-terminal memtransistor crossbar array with increased parallelism in programming via independent gate control, which allows in situ computation at a dense cell size of 3-4.5 F2 and a minimal sneak current of 0.1 nA. Moreover, a low switching energy of 20 fJ/bit is achieved at a voltage of merely 0.42 V. The architecture is capable of performing multiply-and-accumulate operation, a core computing task for pattern classification. A high MNIST recognition accuracy of 96.87% is simulated owing to the linear synaptic plasticity. Such computing paradigm is deemed revolutionary toward enabling data-centric applications in artificial intelligence and Internet-of-things.

Zero-bias mid-infrared graphene photodetectors with bulk photoresponse and calibration-free polarization detection.

Bulk photovoltaic effect (BPVE), featuring polarization-dependent uniform photoresponse at zero external bias, holds potential for exceeding the Shockley-Queisser limit in the efficiency of existing opto-electronic devices. However, the implementation of BPVE has been limited to the naturally existing materials with broken inversion symmetry, such as ferroelectrics, which suffer low efficiencies. Here, we propose metasurface-mediated graphene photodetectors with cascaded polarization-sensitive photoresponse under uniform illumination, mimicking an artificial BPVE. With the assistance of non-centrosymmetric metallic nanoantennas, the hot photocarriers in graphene gain a momentum upon their excitation and form a shift current which is nonlocal and directional. Thereafter, we demonstrate zero-bias uncooled mid-infrared photodetectors with three orders higher responsivity than conventional BPVE and a noise equivalent power of 0.12 nW Hz-1/2. Besides, we observe a vectorial photoresponse which allows us to detect the polarization angle of incident light with a single device. Our strategy opens up alternative possibilities for scalable, low-cost, multifunctional infrared photodetectors.