Ultracompliant Heterogeneous Copper-Tin Nanowire Arrays Making a Supersolder.

Due to the substantial increase in power density, thermal interface resistance that can constitute more than 50% of the total thermal resistance has generally become a bottleneck for thermal management in electronics. However, conventional thermal interface materials (TIMs) such as solder, epoxy, gel, and grease cannot fulfill the requirements of electronics for high-power and long-term operation. Here, we demonstrate a high-performance TIM consisting of a heterogeneous copper-tin nanowire array, which we term "supersolder" to emulate the role of conventional solders in bonding various surfaces. The supersolder is ultracompliant with a shear modulus 2-3 orders of magnitude lower than traditional solders and can reduce the thermal resistance by two times as compared with the state-of-the-art TIMs. This supersolder also exhibits excellent long-term reliability with >1200 thermal cycles over a wide temperature range. By resolving this critical thermal bottleneck, the supersolder enables electronic systems, ranging from microelectronics and portable electronics to massive data centers, to operate at lower temperatures with higher power density and reliability.

Techno-economic feasibility analysis of an extreme heat flux micro-cooler.

An estimated 70% of the electricity in the United States currently passes through power conversion electronics, and this percentage is projected to increase eventually to up to 100%. At a global scale, wide adoption of highly efficient power electronics technologies is thus anticipated to have a major impact on worldwide energy consumption. As described in this perspective, for power conversion, outstanding thermal management for semiconductor devices is one key to unlocking this potentially massive energy savings. Integrated microscale cooling has been positively identified for such thermal management of future high-heat-flux, i.e., 1 kW/cm2, wide-bandgap (WBG) semiconductor devices. In this work, we connect this advanced cooling approach to the energy impact of using WBG devices and further present a techno-economic analysis to clarify the projected status of performance, manufacturing approaches, fabrication costs, and remaining barriers to the adoption of such cooling technology.

A novel hardmask-to-substrate pattern transfer method for creating 3D, multi-level, hierarchical, high aspect-ratio structures for applications in microfluidics and cooling technologies.

This letter solves a major hurdle that mars photolithography-based fabrication of micro-mesoscale structures in silicon. Conventional photolithography is usually performed on smooth, flat wafer surfaces to lay a 2D design and subsequently etch it to create single-level features. It is, however, unable to process non-flat surfaces or already etched wafers and create more than one level in the structure. In this study, we have described a novel cleanroom-based process flow that allows for easy creation of such multi-level, hierarchical 3D structures in a substrate. This is achieved by introducing an ultra-thin sacrificial silicon dioxide hardmask layer on the substrate which is first 3D patterned via multiple rounds of lithography. This 3D pattern is then scaled vertically by a factor of 200-300 and transferred to the substrate underneath via a single shot deep etching step. The proposed method is also easily characterizable-using features of different topographies and dimensions, the etch rates and selectivities were quantified; this characterization information was later used while fabricating specific target structures. Furthermore, this study comprehensively compares the novel pattern transfer technique to already existing methods of creating multi-level structures, like grayscale lithography and chip stacking. The proposed process was found to be cheaper, faster, and easier to standardize compared to other methods-this made the overall process more reliable and repeatable. We hope it will encourage more research into hybrid structures that hold the key to dramatic performance improvements in several micro-mesoscale devices.

Metal-Organic-Inorganic Nanocomposite Thermal Interface Materials with Ultralow Thermal Resistances.

As electronic devices get smaller and more powerful, energy density of energy storage devices increases continuously, and moving components of machinery operate at higher speeds, the need for better thermal management strategies is becoming increasingly important. The removal of heat dissipated during the operation of electronic, electrochemical, and mechanical devices is facilitated by high-performance thermal interface materials (TIMs) which are utilized to couple devices to heat sinks. Herein, we report a new class of TIMs involving the chemical integration of boron nitride nanosheets (BNNS), soft organic linkers, and a copper matrix-which are prepared by the chemisorption-coupled electrodeposition approach. These hybrid nanocomposites demonstrate bulk thermal conductivities ranging from 211 to 277 W/(m K), which are very high considering their relatively low elastic modulus values on the order of 21.2-28.5 GPa. The synergistic combination of these properties led to the ultralow total thermal resistivity values in the range of 0.38-0.56 mm2 K/W for a typical bond-line thickness of 30-50 µm, advancing the current state-of-art transformatively. Moreover, its coefficient of thermal expansion (CTE) is 11 ppm/K, forming a mediation zone with a low thermally induced axial stress due to its close proximity to the CTE of most coupling surfaces needing thermal management.