Energy Dissipation in Monolayer MoS2 Electronics.

The advancement of nanoscale electronics has been limited by energy dissipation challenges for over a decade. Such limitations could be particularly severe for two-dimensional (2D) semiconductors integrated with flexible substrates or multilayered processors, both being critical thermal bottlenecks. To shed light into fundamental aspects of this problem, here we report the first direct measurement of spatially resolved temperature in functioning 2D monolayer MoS2 transistors. Using Raman thermometry, we simultaneously obtain temperature maps of the device channel and its substrate. This differential measurement reveals the thermal boundary conductance of the MoS2 interface with SiO2 (14 ± 4 MW m-2 K-1) is an order magnitude larger than previously thought, yet near the low end of known solid-solid interfaces. Our study also reveals unexpected insight into nonuniformities of the MoS2 transistors (small bilayer regions) which do not cause significant self-heating, suggesting that such semiconductors are less sensitive to inhomogeneity than expected. These results provide key insights into energy dissipation of 2D semiconductors and pave the way for the future design of energy-efficient 2D electronics.

Energy-Efficient Phase-Change Memory with Graphene as a Thermal Barrier.

Phase-change memory (PCM) is an important class of data storage, yet lowering the programming current of individual devices is known to be a significant challenge. Here we improve the energy-efficiency of PCM by placing a graphene layer at the interface between the phase-change material, Ge2Sb2Te5 (GST), and the bottom electrode (W) heater. Graphene-PCM (G-PCM) devices have ∼40% lower RESET current compared to control devices without the graphene. This is attributed to the graphene as an added interfacial thermal resistance which helps confine the generated heat inside the active PCM volume. The G-PCM achieves programming up to 10(5) cycles, and the graphene could further enhance the PCM endurance by limiting atomic migration or material segregation at the bottom electrode interface.

Transport in nanoribbon interconnects obtained from graphene grown by chemical vapor deposition.

We study graphene nanoribbon (GNR) interconnects obtained from graphene grown by chemical vapor deposition (CVD). We report low- and high-field electrical measurements over a wide temperature range, from 1.7 to 900 K. Room temperature mobilities range from 100 to 500 cm(2)·V(-1)·s(-1), comparable to GNRs from exfoliated graphene, suggesting that bulk defects or grain boundaries play little role in devices smaller than the CVD graphene crystallite size. At high-field, peak current densities are limited by Joule heating, but a small amount of thermal engineering allows us to reach ∼2 × 10(9) A/cm(2), the highest reported for nanoscale CVD graphene interconnects. At temperatures below ∼5 K, short GNRs act as quantum dots with dimensions comparable to their lengths, highlighting the role of metal contacts in limiting transport. Our study illustrates opportunities for CVD-grown GNRs, while revealing variability and contacts as remaining future challenges.

Spatially Resolved Thermometry of Resistive Memory Devices.

The operation of resistive and phase-change memory (RRAM and PCM) is controlled by highly localized self-heating effects, yet detailed studies of their temperature are rare due to challenges of nanoscale thermometry. Here we show that the combination of Raman thermometry and scanning thermal microscopy (SThM) can enable such measurements with high spatial resolution. We report temperature-dependent Raman spectra of HfO2, TiO2 and Ge2Sb2Te5 (GST) films, and demonstrate direct measurements of temperature profiles in lateral PCM devices. Our measurements reveal that electrical and thermal interfaces dominate the operation of such devices, uncovering a thermal boundary resistance of 28 ± 8 m2K/GW at GST-SiO2 interfaces and an effective thermopower 350 ± 50 µV/K at GST-Pt interfaces. We also discuss possible pathways to apply Raman thermometry and SThM techniques to nanoscale and vertical resistive memory devices.

Temperature-Dependent Thermal Boundary Conductance of Monolayer MoS2 by Raman Thermometry.

The electrical and thermal behavior of nanoscale devices based on two-dimensional (2D) materials is often limited by their contacts and interfaces. Here we report the temperature-dependent thermal boundary conductance (TBC) of monolayer MoS2 with AlN and SiO2, using Raman thermometry with laser-induced heating. The temperature-dependent optical absorption of the 2D material is crucial in such experiments, which we characterize here for the first time above room temperature. We obtain TBC ∼ 15 MW m-2 K-1 near room temperature, increasing as ∼ T0.65 in the range 300-600 K. The similar TBC of MoS2 with the two substrates indicates that MoS2 is the "softer" material with weaker phonon irradiance, and the relatively low TBC signifies that such interfaces present a key bottleneck in energy dissipation from 2D devices. Our approach is needed to correctly perform Raman thermometry of 2D materials, and our findings are key for understanding energy coupling at the nanoscale.