Bidirectional Voltage Regulation for Integrated Photovoltachromic Device Based on P3HT-Electrochromic Unit and Perovskite/Organic Tandem Solar Cells.

Integrated electrochromic devices powered by photovoltaic cells have evoked a lot of interest due to their promising commercial prospects. However, their application has been restricted by the voltage adaption between the self-powered voltage and the color-changing threshold voltage (Vt). Herein, a strategy of bidirectional voltage regulating is proposed to develop a novel stand-alone integrated photovoltachromic device (I-PVCD), which integrates perovskite/organic tandem solar cells (P/O-TSCs) to drive color-changing process of conjugated poly(3-hexylthiophene) (P3HT) films. To lower the driving-voltage of electrochromic layer, C60 is introduced to decrease the onset oxidation potential of P3HT film, and thus leading to a reduced Vt of 0.70 V benefiting from the enhanced highest occupied molecular orbital level and decreased charge transfer resistance from 67.46 to 49.89 Ω. Simultaneously, PBDB-T is utilized as the hole transport layer in the interconnecting layer of CsPbI2Br/PTB7-Th:IEICO-4F P/O-TSC to improve its open-circuit voltage (Voc) to 1.85 V. Under their synergetic merits, a I-PVCD with a wider self-adaptive voltage range is achieved. This device can undergo fast and reversible chromic transition from beautiful magenta to transparent only under the solar radiation, and demonstrates a coloration efficiency of 351.90 cm2 C-1 and a switching time of 2 s besides its excellent operating reliability.

A Novel Dielectric Modulated Gate-Stack Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor-Based Sensor for Detecting Biomolecules.

In this article, the performance of n-type junctionless (JL) double-gate (DG) MOSFET-based biosensors with and without gate stack (GS) has been studied. Here, the dielectric modulation (DM) method is applied to detect biomolecules in the cavity. The sensitivity of n-type JL-DM-DG-MOSFET and n-type JL-DM-GSDG-MOSFET-based biosensors have also been evaluated. The sensitivity (ΔVth) improved in JL-DM-GSDG MOSFET/JL-DM-DG-MOSFET-based biosensors for neutral/charged biomolecules is 116.66%/66.66% and 1165.78%/978.94%, respectively, compared with the previously reported results. The electrical detection of biomolecules is validated using the ATLAS device simulator. The noise and analog/RF parameters are compared between both biosensors. A lower threshold voltage is observed in the GSDG-MOSFET-based biosensor. The Ion/Ioff ratio is higher for DG-MOSFET-based biosensors. The proposed GSDG-MOSFET-based biosensor demonstrates higher sensitivity than the DG-MOSFET-based biosensor. The GSDG-MOSFET-based biosensor is suitable for low-power, high-speed, and high sensitivity applications.

Organic Electrochemical Transistor Based on Hydrophobic Polymer Tuned by Ionic Gels.

Hydrophobic conjugated polymers have poor ionic transport property, so hydrophilic side chains are often grafted for their application as organic electrochemical transistors (OECTs). However, this modification lowers their charge transport ability. Here, an ionic gel interfacial layer is applied to improve the ionic transport while retaining the charge transport ability of the polymers. By using the ionic gels comprising gel matrix and ionic liquids as the interfacial layers, the hydrophobic polymer achieves the OECT feature with high transconductance, low threshold voltage, high current on/off ratio, short switching time, and high operational stability. The working mechanism is also revealed. Moreover, the OECT performance can be tuned by varying the types and ratios of ionic gels. With the proposed ionic gel strategy, OECTs can be effectively realized with hydrophobic conjugated polymers.

A TSTDP memristive synapse based on a comprehensive mathematical model of memory-TFT threshold voltage shift.

New emerging nano-scale technologies like hydrogenated noncrystalline-silicon thin-film transistors (TFTs) and memristors, fabricated at low temperatures and over large areas, permit low-cost processing and 3D integration with CMOS cores. Here, we aim to propose a mathematical model which explains the memory-TFT threshold voltage shift due to the gate bias instability. Then, based on this mathematical approach, we propose a novel learning synapse composed of a voltage/flux driven memristor in parallel with a common-source memory-TFT with a memristive load. The proposed device realizes the triplet-based spike-timing-dependent plasticity rule (TSTDP) as a more realistic form of learning than the purely pair-based STDP (PSTDP). PSTDP is a synaptic learning rule which utilizes a constant-frequency pairing protocol to induce synaptic weight change and cannot explain the modification due to the frequency changes of spike pairs, and also the outcomes of triplet and quadruplet experiments. However, TSTDP improves the learning capabilities of the conventional PSTDP and reproduces the results of more electrophysiological experiments. In this paper, we apply various spike patterns like different-frequency and different-timing spike pairs, spike triplets, and quadruplets to the proposed device. Our simulations confirm a close match with the experimental data sets of real biological synapses.

A Highly Efficient RF-DC Converter for Energy Harvesting Applications Using a Threshold Voltage Cancellation Scheme.

In this paper, a self-threshold voltage (Vth) compensated Radio Frequency to Direct Current (RF-DC) converter operating at 900 MHz and 2.4 GHz is proposed for RF energy harvesting applications. The threshold voltage of the rectifying devices is compensated by the bias voltage generated by the auxiliary transistors and output DC voltage. The auxiliary transistors compensate the threshold voltage (Vth) of the PMOS rectifying device while the threshold voltage (Vth) of the NMOS rectifying device is compensated by the output DC voltage. The proposed RF-DC converter was implemented in 180 nm Complementary Metal-Oxide Semiconductor (CMOS) technology. The experimental results show that the proposed design achieves better performance at both 900 MHz and 2.4 GHz frequencies in terms of PCE, output voltage, sensitivity, and effective area. The peak power conversion efficiency (PCE) of 38.5% at -12 dBm across a 1 MΩ load for 900 MHz frequency was achieved. Similarly, for 2.4 GHz frequency, the proposed circuit achieves a peak PCE of 26.5% at -6 dBm across a 1 MΩ load. The proposed RF-DC converter circuit shows a sensitivity of -20 dBm across a 1 MΩ load and produces a 1 V output DC voltage.

Systematic Control of Negative Transconductance in Organic Heterojunction Transistor for High-Performance, Low-Power Flexible Ternary Logic Circuits.

Organic multi-valued logic (MVL) circuits can substantially improve the data processing efficiency in highly advanced wearable electronics. Organic ternary logic circuits can be implemented by utilizing the negative transconductance (NTC) of heterojunction transistors (H-TRs). To achieve high-performance organic ternary logic circuits, the range of NTC in H-TRs must be optimized in advance to ensure the well-defined intermediate logic state in ternary logic inverters (T-inverters). Herein, a simple and efficient strategy, which enables the systematic control of the range and position of NTC in H-TRs is presented. Each thickness of p-/n-type semiconductor in H-TRs is adjusted to control the channel conductivity. Furthermore, asymmetric source/drain (S/D) electrode structure is newly developed for H-TRs, which can adjust the amount of hole and electron injection, independently. Based on the semiconductor thickness variation and asymmetric S/D electrodes, the T-inverter exhibits full-swing operation with three distinguishable logic states, resulting in unprecedentedly high static noise margin (≈48% of the ideal value). Moreover, a flexible T-inverter with an ultrathin polymer dielectric is demonstrated, whose operating voltage is less than 8 V. The proposed strategy is fully compatible with the conventional integrated circuit design, which is highly desirable for broad applicability and scalability for various types of T-inverter production.

Experimental study of threshold voltage shift for Si:HfO2based ferroelectric field effect transistor.

For a given three different Si doping concentrations at room and high temperatures, the threshold voltage shift (ΔVth) on silicon-doped hafnium-oxide-based ferroelectric field effect transistor (FeFET) is experimentally investigated. It turned out that charge trapping in the gate stack of FeFET (versus polarization switching in the gate stack of FeFET) adversely affects ΔVth. Charge trapping causes the positive ΔVth, while polarization switching causes the negative ΔVth. The dominance of polarization switching is predominantly determined by the total remnant polarization (2Pr), which can be controlled by adjusting Si doping concentration in the hafnium-oxide layer. As the Si doping concentration increases from 2.5% to 3.6%, and 5.0%, 2Prdecreases 19.8µC cm-2to 15.25µC cm-2, and 12.5µC cm-2, which leads to ΔVthof -0.8 V, -0.09 V, and +0.1 V, respectively, at room temperature. At high temperature, the effect of polarization switching is degraded due to the decreasedPr, while the effect of charge trapping is very independent of temperature. For those three different Si doping concentrations (i.e. 2.5%, 3.6%, and 5.0%), at the high temperature, ΔVthof FeFET is -0.675 V, -0.075 V, and +0.15 V, respectively. This experimental work should provide an insight for designing FeFET for memory and logic applications.

Low power consumption photoelectric coupling perovskite memristor with adjustable threshold voltage.

Organic-inorganic halide perovskites (OHPs) have been proven to possess unique optical and electrical properties, and achieved more extensive application as excellent materials for memristors in recent years. Based on the traditional OHP-based memristors, the intermediate layer of the memristor was prepared using yttrium oxide (Y2O3)/OHP stacking structure in this manuscript. The potential barrier between Y2O3and perovskite is relatively high (ΔEC = 2.13 eV) which leads to comparatively low current of the memristor, thus the power consumption can be reduced. Besides, by changing the external light conditions, one can realize sharp or slow switch between high resistance state (HRS) and low resistance state (LRS), so as to meet the requirement of multilevel data storage, which indicates its promising application prospect in information storage and biological simulation. In addition, based on characteristics of photoelectric coupling, the Y2O3/OHP memristor can also achieve the advantage of adjustable threshold voltage. The transition of HRS and LRS can be realized by changing the illumination condition at any voltage, which means the set and reset voltage are not fixed, so that the memristor with adjustable threshold voltage can adapt to various working conditions.

A 0.3 V PNN Based 10T SRAM with Pulse Control Based Read-Assist and Write Data-Aware Schemes for Low Power Applications.

An innovative and stable PNN based 10-transistor (10T) static random-access memory (SRAM) architecture has been designed for low-power bit-cell operation and sub-threshold voltage applications. The proposed design belongs to the following features: (a) pulse control based read-assist circuit offers a dynamic read decoupling approach for eliminating the read interference; (b) we have utilized the write data-aware techniques to cut off the pull-down path; and (c) additional write current has enhanced the write capability during the operation. The proposed design not only solves the half-selected problems and increases the read static noise margin (RSNM) but also provides low leakage power performance. The designed architecture of 1-Kb SRAM macros (32 rows × 32 columns) has been implemented based on the TSMC-40 nm GP CMOS process technology. At 300 mV supply voltage and 10 MHz operating frequency, the read and write power consumption is 4.15 µW and 3.82 µW, while the average energy consumption is only 0.39 pJ.

Impact of Organic Molecule-Induced Charge Transfer on Operating Voltage Control of Both n-MoS2 and p-MoTe2 Transistors.

Since transition metal dichalcogenide (TMD) semiconductors are found as two-dimensional van der Waals materials with a discrete energy bandgap, many TMD based field effect transistors (FETs) are reported as prototype devices. However, overall reports indicate that threshold voltage ( Vth) of those FETs are located far away from 0 V whether the channel is p- or n-type. This definitely causes high switching voltage and unintended OFF-state leakage current. Here, a facile way to simultaneously modulate the Vth of both p- and n-channel FETs with TMDs is reported. The deposition of various organic small molecules on the channel results in charge transfer between the organic molecule and TMD channels. Especially, HAT-CN molecule is found to ideally work for both p- and n-channels, shifting their Vth toward 0 V concurrently. As a proof of concept, a complementary metal oxide semiconductor (CMOS) inverter with p-MoTe2 and n-MoS2 channels shows superior voltage gain and minimal power consumption after HAT-CN deposition, compared to its initial performance. When the same TMD FETs of the CMOS structure are integrated into an OLED pixel circuit for ambipolar switching, the circuit with HAT-CN film demonstrates complete ON/OFF switching of OLED pixel, which was not switched off without HAT-CN.

Threshold Voltage Control of Multilayered MoS2 Field-Effect Transistors via Octadecyltrichlorosilane and their Applications to Active Matrixed Quantum Dot Displays Driven by Enhancement-Mode Logic Gates.

In recent past, for next-generation device opportunities such as sub-10 nm channel field-effect transistors (FETs), tunneling FETs, and high-end display backplanes, tremendous research on multilayered molybdenum disulfide (MoS2 ) among transition metal dichalcogenides has been actively performed. However, nonavailability on a matured threshold voltage control scheme, like a substitutional doping in Si technology, has been plagued for the prosperity of 2D materials in electronics. Herein, an adjustment scheme for threshold voltage of MoS2 FETs by using self-assembled monolayer treatment via octadecyltrichlorosilane is proposed and demonstrated to show MoS2 FETs in an enhancement mode with preservation of electrical parameters such as field-effect mobility, subthreshold swing, and current on-off ratio. Furthermore, the mechanisms for threshold voltage adjustment are systematically studied by using atomic force microscopy, Raman, temperature-dependent electrical characterization, etc. For validation of effects of threshold voltage engineering on MoS2 FETs, full swing inverters, comprising enhancement mode drivers and depletion mode loads are perfectly demonstrated with a maximum gain of 18.2 and a noise margin of ≈45% of 1/2 VDD . More impressively, quantum dot light-emitting diodes, driven by enhancement mode MoS2 FETs, stably demonstrate 120 cd m-2 at the gate-to-source voltage of 5 V, exhibiting promising opportunities for future display application.

Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits.

Top-gated p-type field-effect transistors (FETs) have been fabricated in batch based on carbon nanotube (CNT) network thin films prepared from CNT solution and present high yield and highly uniform performance with small threshold voltage distribution with standard deviation of 34 mV. According to the property of FETs, various logical and arithmetical gates, shifters, and d-latch circuits were designed and demonstrated with rail-to-rail output. In particular, a 4-bit adder consisting of 140 p-type CNT FETs was demonstrated with higher packing density and lower supply voltage than other published integrated circuits based on CNT films, which indicates that CNT based integrated circuits can reach to medium scale. In addition, a 2-bit multiplier has been realized for the first time. Benefitted from the high uniformity and suitable threshold voltage of CNT FETs, all of the fabricated circuits based on CNT FETs can be driven by a single voltage as small as 2 V.

Synthesis of WS2xSe2-2x Alloy Nanosheets with Composition-Tunable Electronic Properties.

Two-dimensional (2D) layered transition metal dichalcogenides (TMDs) have recently emerged as a new class of atomically thin semiconductors for diverse electronic, optoelectronic, and valleytronic applications. To explore the full potential of these 2D semiconductors requires a precise control of their band gap and electronic properties, which represents a significant challenge in 2D material systems. Here we demonstrate a systematic control of the electronic properties of 2D-TMDs by creating mixed alloys of the intrinsically p-type WSe2 and intrinsically n-type WS2 with variable alloy compositions. We show that a series of WS2xSe2-2x alloy nanosheets can be synthesized with fully tunable chemical compositions and optical properties. Electrical transport studies using back-gated field effect transistors demonstrate that charge carrier types and threshold voltages of the alloy nanosheet transistors can be systematically tuned by adjusting the alloy composition. A highly p-type behavior is observed in selenium-rich alloy, which gradually shifts to lightly p-type, and then switches to lightly n-type characteristics with the increasing sulfur atomic ratio, and eventually evolves into highly n-doped semiconductors in sulfur-rich alloys. The synthesis of WS2xSe2-2x nanosheets with tunable optical and electronic properties represents a critical step toward rational design of 2D electronics with tailored spectral responses and device characteristics.

Improved Vth Stability and Gate Reliability of GaN-Based MIS-HEMTs by Employing Alternating O2 Plasma Treatment.

The Vth stability and gate reliability of AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with alternating O2 plasma treatment were systematically investigated in this article. It was found that the conduction band offset at the Al2O3/AlGaN interface was elevated to 2.4 eV, which contributed to the suppressed gate leakage current. The time-dependent dielectric breakdown (TDDB) test results showed that the ALD-Al2O3 with the alternating O2 plasma treatment had better quality and reliability. The AlGaN/GaN MIS-HEMT with the alternating O2 plasma treatment demonstrated remarkable advantages in higher Vth stability under high-temperature and long-term gate bias stress.

Over 60 h of Stable Water-Operation for N-Type Organic Electrochemical Transistors with Fast Response and Ambipolarity.

Organic electrochemical transistors (OECTs) are of great interest in low-power bioelectronics and neuromorphic computing, as they utilize organic mixed ionic-electronic conductors (OMIECs) to transduce ionic signals into electrical signals. However, the poor environmental stability of OMIEC materials significantly restricts the practical application of OECTs. Therefore, the non-fused planar naphthalenediimide (NDI)-dialkoxybithiazole (2Tz) copolymers are fine-tuned through varying ethylene glycol (EG) side chain lengths from tri(ethylene glycol) to hexa(ethylene glycol) (namely P-XO, X = 3-6) to achieve OECTs with high-stability and low threshold voltage. As a result, the NDI-2Tz copolymers exhibit ambipolarity, rapid response (<10 ms), and ultra-high n-type stability. Notably, the P-6O copolymers display a threshold voltage as low as 0.27 V. They can operate in n-type mode in an aqueous solution for over 60 h, maintaining an on-off ratio of over 105. This work sheds light on the design of exceptional n-type/ambipolar materials for OECTs. It demonstrates the potential of incorporating these ambipolar polymers into water-operational integrated circuits for long-term biosensing systems and energy-efficient brain-inspired computing.

Tuning the Threshold Voltage of an Oxide Thin-Film Transistor by Electron Injection Control Using a p-n Semiconductor Heterojunction Structure.

Herein, a heterojunction structure integrating p-type tellurium (Te) and n-type aluminum-doped indium-zinc-tin oxide (Al:IZTO) is shown to precisely modulate the threshold voltage (VT) of the oxide thin-film transistor (TFT). The proposed architecture integrates Te as an electron-blocking layer and Al:IZTO as a charge-carrier transporting layer, thereby enabling controlled electron injection. The effects of incorporating the Te layer onto Al:IZTO are investigated, with a focus on X-ray photoelectron spectroscopy (XPS) analysis, in order to explain the behavior of oxygen vacancies and to depict the energy band structure configurations. By modulating the thickness and employing both single and double deposition methods for the heterojunction Te layer, a remarkable VT shift of up to +20 V is achieved. Furthermore, this study also shows excellent stability to a positive bias stress of +2 MV/cm for 10,000 s without additional passivation layers, demonstrating the robustness of the designed TFT. By a thorough optimization of the Al:IZTO/Te interface, the results demonstrate not only the substantial impact of the introduced heterojunction structure on VT control but also the endurance, durability, and stability of the optimized TFTs under prolonged long-term operating stress, thus offering promising prospects for tailored semiconductor device applications.

Improvement Performance of p-GaN Gate High-Electron-Mobility Transistors with GaN/AlN/AlGaN Barrier Structure.

This study demonstrates a particular composited barrier structure of high-electron-mobility transistors (HEMTs) with an enhancement mode composed of p-GaN/GaN/AlN/AlGaN/GaN. The purpose of the composite barrier structure device is to increase the maximum drain current, reduce gate leakage, and achieve lower on-resistance (Ron) performance. A comparison was made between the conventional device without the composited barrier and the device with the composited barrier structure. The maximum drain current is significantly increased by 37%, and Ron is significantly reduced by 23%, highlighting the synergistic impact of the composite barrier structure on device performance improvement. This reason can be attributed to the undoped GaN (u-GaN) barrier layer beneath p-GaN, which was introduced to mitigate Mg diffusion in the capping layer, thus addressing its negative effects. Furthermore, the AlN barrier layer exhibits enhanced electrical properties, which can be attributed to the critical role of high-energy-gap properties that increase the 2DEG carrier density and block leakage pathways. These traps impact the device behavior mechanism, and the simulation for a more in-depth analysis of how the composited barrier structure brings improvement is introduced using Synopsys Sentaurus TCAD.

4H-SiC MOSFET Threshold Voltage Instability Evaluated via Pulsed High-Temperature Reverse Bias and Negative Gate Bias Stresses.

This paper presents a reliability study of a conventional 650 V SiC planar MOSFET subjected to pulsed HTRB (High-Temperature Reverse Bias) stress and negative HTGB (High-Temperature Gate Bias) stress defined by a TCAD static simulation showing the electric field distribution across the SiC/SiO2 interface. The instability of several electrical parameters was monitored and their drift analyses were investigated. Moreover, the shift of the onset of the Fowler-Nordheim gate injection current under stress conditions provided a reliable method to quantify the trapped charge inside the gate oxide bulk, and it allowed us to determine the real stress conditions. Moreover, it has been demonstrated from the cross-correlation, the TCAD simulation, and the experimental ΔVth and ΔVFN variation that HTGB stress is more severe compared to HTRB. In fact, HTGB showed a 15% variation in both ΔVth and ΔVFN, while HTRB showed only a 4% variation in both ΔVth and ΔVFN. The physical explanation was attributed to the accelerated degradation of the gate insulator in proximity to the source region under HTGB configuration.

Positive Bias Temperature Instability in SiC-Based Power MOSFETs.

This paper investigates the threshold voltage shift (ΔVTH) induced by positive bias temperature instability (PBTI) in silicon carbide (SiC) power MOSFETs. By analyzing ΔVTH under various gate stress voltages (VGstress) at 150 °C, distinct mechanisms are revealed: (i) trapping in the interface and/or border pre-existing defects and (ii) the creation of oxide defects and/or trapping in spatially deeper oxide states with an activation energy of ~80 meV. Notably, the adoption of different characterization methods highlights the distinct roles of these mechanisms. Moreover, the study demonstrates consistent behavior in permanent ΔVTH degradation across VGstress levels using a power law model. Overall, these findings deepen the understanding of PBTI in SiC MOSFETs, providing insights for reliability optimization.

Reversible Charge Transfer Doping in Atomically Thin In2O3 by Viologens.

Atomically thin oxide semiconductors are emerging as potential materials for their potentiality in monolithic 3D integration and sensor applications. In this study, a charge transfer method employing viologen, an organic compound with exceptional reduction potential among n-type organics, is presented to modulate the carrier concentration in atomically thin In2O3 without the need of annealing. This study highlights the critical role of channel thickness on doping efficiency, revealing that viologen charge transfer doping is increasingly pronounced in thinner channels owing to their increased surface-to-volume ratio. Upon viologen doping, an electron sheet density of 6.8 × 1012 cm-2 is achieved in 2 nm In2O3 back gate device while preserving carrier mobility. Moreover, by the modification of the functional groups, viologens can be conveniently removed with acetone and an ultrasonic cleaner, making the viologen treatment a reversible process. Based on this doping scheme, we demonstrate an n-type metal oxide semiconductor inverter with viologen-doped In2O3, exhibiting a voltage gain of 26 at VD = 5 V. This complementary pairing of viologen and In2O3 offers ease of control over the carrier concentration, making it suitable for the next-generation electronic applications.