pH Quantification in Human Dermal Interstitial Fluid Using Ultra-Thin SOI Silicon Nanowire ISFETs and a High-Sensitivity Constant-Current Approach.

In this paper, we propose a novel approach to utilize silicon nanowires as high-sensitivity pH sensors. Our approach works based on fixing the current bias of silicon nanowires Ion Sensitive Field Effect Transistors (ISFETs) and monitor the resulting drain voltage as the sensing signal. By fine tuning the injected current levels, we can optimize the sensing conditions according to different sensor requirements. This method proves to be highly suitable for real-time and continuous measurements of biomarkers in human biofluids. To validate our approach, we conducted experiments, with real human sera samples to simulate the composition of human interstitial fluid (ISF), using both the conventional top-gate approach and the optimized constant current method. We successfully demonstrated pH sensing within the physiopathological range of 6.5 to 8, achieving an exceptional level of accuracy in this complex matrix. Specifically, we obtained a maximum error as low as 0.92% (equivalent to 0.07 pH unit) using the constant-current method at the optimal current levels (1.71% for top-gate). Moreover, by utilizing different pools of human sera with varying total protein content, we demonstrated that the protein content among patients does not impact the sensors' performance in pH sensing. Furthermore, we tested real-human ISF samples collected from volunteers. The obtained accuracy in this scenario was also outstanding, with an error as low as 0.015 pH unit using the constant-current method and 0.178 pH unit in traditional top-gate configuration.

Integration of Ultra-Low Volume Pneumatic Microfluidics with a Three-Dimensional Electrode Network for On-Chip Biochemical Sensing.

This paper reports a novel miniaturized pseudo reference electrode (RE) design for biasing Ion Sensitive Field Effect Transistors (ISFETs). It eliminates the need for post-CMOS processing and can scale up in numbers with the CMOS scaling. The presented design employs silane-mediated transfer of patterned gold electrode lines onto PDMS microfluidics such that the gold conformally coats the inside of microfluidic channel. Access to this electrode network is made possible by using "through-PDMS-vias" (TPV), which consist of high metal-coated SU-8 pillars manufactured by a novel process that employs a patterned positive resist layer as SU-8 adhesion depressor. When integrated with pneumatic valves, TPV and pseudo-RE network were able to bias 1.5 nanoliters (nL) of isolated electrolyte volumes. We present a detailed characterization of our pseudo-RE design demonstrating ISFET operation and its DC characterization. The stability of pseudo-RE is investigated by measuring open circuit potential (OCP) against a commercial Ag/AgCl reference electrode.

Reduction of random telegraph noise by high-pressure deuterium annealing for p-type omega-gate nanowire FET.

In this work, we studied the effect of high-pressure deuterium annealing (HPDA) on a p-type omega-gate nanowire field effect transistor by random telegraph noise (RTN) signal analysis. After HPDA under conditions of 400 °C and 10 atm for 30 min, IOFF decreases by 41.2% and ION increases by up to 5.4%. Also, subthreshold swing (SS) is reduced from 72 mV dec-1 to 70 mV dec-1. In RTN analysis, multi-level RTN is reduced to single-level RTN due to the passivation of a fast trap site by HPDA. ΔID/ID is also decreased 1.3 and 1.1 times at |VOV| = 0.2 V and 0.4 V, respectively. From the low-frequency noise analysis, the reduction of trap density is observed by 86% at |VOV| = 0.4 V after HPDA. Through these results, we found that the HPDA reduces traps of gate dielectric and improves the quality of the interface between gate dielectric and NW channel in p-type OGNW FET.

Gate-based high fidelity spin readout in a CMOS device.

The engineering of a compact qubit unit cell that embeds all quantum functionalities is mandatory for large-scale integration. In addition, these functionalities should present the lowest error rate possible to successfully implement quantum error correction protocols1. Electron spins in silicon quantum dots are particularly promising because of their high control fidelity2-5 and their potential compatibility with complementary metal-oxide-semiconductor industrial platforms6,7. However, an efficient and scalable spin readout scheme is still missing. Here we demonstrate a high fidelity and robust spin readout based on gate reflectometry in a complementary metal-oxide-semiconductor device that consists of a qubit dot and an ancillary dot coupled to an electron reservoir. This scalable method allows us to read out a spin in a single-shot manner with an average fidelity above 98% for a 0.5 ms integration time. To achieve such a fidelity, we combine radio-frequency gate reflectometry with a latched spin blockade mechanism that requires electron exchange between the ancillary dot and the reservoir. We show that the demonstrated high readout fidelity is fully preserved up to 0.5 K. This result holds particular relevance for the future cointegration of spin qubits and classical control electronics.

Process Variability-Technological Challenge and Design Issue for Nanoscale Devices.

Current advanced transistor architectures, such as FinFETs and (stacked) nanowires and nanosheets, employ truly three-dimensional architectures. Already for aggressively scaled bulk transistors, both statistical and systematic process variations have critically influenced device and circuit performance. Three-dimensional device architectures make the control and optimization of the device geometries even more important, both in view of the nominal electrical performance to be achieved and its variations. In turn, it is essential to accurately simulate the device geometry and its impact on the device properties, including the effect caused by non-idealized processes which are subject to various kinds of systematic variations induced by process equipment. In this paper, the hierarchical simulation system developed in the SUPERAID7 project to study the impact of variations from equipment to circuit level is presented. The software system consists of a combination of existing commercial and newly developed tools. As the paper focuses on technological challenges, especially issues resulting from the structuring processes needed to generate the three-dimensional device architectures are discussed. The feasibility of a full simulation of the impact of relevant systematic and stochastic variations on advanced devices and circuits is demonstrated.

Readout and control of the spin-orbit states of two coupled acceptor atoms in a silicon transistor.

Coupling spin qubits to electric fields is attractive to simplify qubit manipulation and couple qubits over long distances. Electron spins in silicon offer long lifetimes, but their weak spin-orbit interaction makes electrical coupling challenging. Hole spins bound to acceptor dopants, spin-orbit-coupled J = 3/2 systems similar to Si vacancies in SiC and single Co dopants, are an electrically active spin system in silicon. However, J = 3/2 systems are much less studied than S = 1/2 electrons, and spin readout has not yet been demonstrated for acceptors in silicon. Here, we study acceptor hole spin dynamics by dispersive readout of single-hole tunneling between two coupled acceptors in a nanowire transistor. We identify m J = ±1/2 and m J = ±3/2 levels, and we use a magnetic field to overcome the initial heavy-light hole splitting and to tune the J = 3/2 energy spectrum. We find regimes of spin-like (+3/2 to -3/2) and charge-like (±1/2 to ±3/2) relaxations, separated by a regime of enhanced relaxation induced by mixing of light and heavy holes. The demonstrated control over the energy level ordering and hybridization are new tools in the J = 3/2 system that are crucial to optimize single-atom spin lifetime and electrical coupling.

Electrical Spin Driving by g-Matrix Modulation in Spin-Orbit Qubits.

In a semiconductor spin qubit with sizable spin-orbit coupling, coherent spin rotations can be driven by a resonant gate-voltage modulation. Recently, we have exploited this opportunity in the experimental demonstration of a hole spin qubit in a silicon device. Here we investigate the underlying physical mechanisms by measuring the full angular dependence of the Rabi frequency, as well as the gate-voltage dependence and anisotropy of the hole g factor. We show that a g-matrix formalism can simultaneously capture and discriminate the contributions of two mechanisms so far independently discussed in the literature: one associated with the modulation of the g factor, and measurable by Zeeman energy spectroscopy, the other not. Our approach has a general validity and can be applied to the analysis of other types of spin-orbit qubits.

Level Spectrum and Charge Relaxation in a Silicon Double Quantum Dot Probed by Dual-Gate Reflectometry.

We report on dual-gate reflectometry in a metal-oxide-semiconductor double-gate silicon transistor operating at low temperature as a double quantum dot device. The reflectometry setup consists of two radio frequency resonators respectively connected to the two gate electrodes. By simultaneously measuring their dispersive responses, we obtain the complete charge stability diagram of the device. Electron transitions between the two quantum dots and between each quantum dot and either the source or the drain contact are detected through phase shifts in the reflected radio frequency signals. At finite bias, reflectometry allows probing charge transitions to excited quantum-dot states, thereby enabling direct access to the energy level spectra of the quantum dots. Interestingly, we find that in the presence of electron transport across the two dots the reflectometry signatures of interdot transitions display a dip-peak structure containing quantitative information on the charge relaxation rates in the double quantum dot.

Gate-Sensing Coherent Charge Oscillations in a Silicon Field-Effect Transistor.

Quantum mechanical effects induced by the miniaturization of complementary metal-oxide-semiconductor (CMOS) technology hamper the performance and scalability prospects of field-effect transistors. However, those quantum effects, such as tunneling and coherence, can be harnessed to use existing CMOS technology for quantum information processing. Here, we report the observation of coherent charge oscillations in a double quantum dot formed in a silicon nanowire transistor detected via its dispersive interaction with a radio frequency resonant circuit coupled via the gate. Differential capacitance changes at the interdot charge transitions allow us to monitor the state of the system in the strong-driving regime where we observe the emergence of Landau-Zener-Stückelberg-Majorana interference on the phase response of the resonator. A theoretical analysis of the dispersive signal demonstrates that quantum and tunneling capacitance changes must be included to describe the qubit-resonator interaction. Furthermore, a Fourier analysis of the interference pattern reveals a charge coherence time, T2 ≈ 100 ps. Our results demonstrate charge coherent control and readout in a simple silicon transistor and open up the possibility to implement charge and spin qubits in existing CMOS technology.

Quantum dot made in metal oxide silicon-nanowire field effect transistor working at room temperature.

We report the observation of an atomic like behavior from T = 4.2 K up to room temperature in n- and p-type Ω-gate silicon nanowire (NW) transistors. For that purpose, we modified the design of a NW transistor and introduced long spacers between the source/drain and the channel in order to separate the channel from the electrodes. The channel was made extremely small (3.4 nm in diameter with 10 nm gate length) with a thick gate oxide (7 nm) in order to enhance the Coulomb repulsion between carriers, which can be as large as 200 meV when surface roughness promotes charge confinement. Parasitic stochastic Coulomb blockade effect can be eliminated in our devices by choosing proper control voltages. Moreover, the quantum dot can be tuned so that the resonant current at T = 4.2 K exceeds that at room temperature.

Few-electron edge-state quantum dots in a silicon nanowire field-effect transistor.

We investigate the gate-induced onset of few-electron regime through the undoped channel of a silicon nanowire field-effect transistor. By combining low-temperature transport measurements and self-consistent calculations, we reveal the formation of one-dimensional conduction modes localized at the two upper edges of the channel. Charge traps in the gate dielectric cause electron localization along these edge modes, creating elongated quantum dots with characteristic lengths of ∼10 nm. We observe single-electron tunneling across two such dots in parallel, specifically one in each channel edge. We identify the filling of these quantum dots with the first few electrons, measuring addition energies of a few tens of millielectron volts and level spacings of the order of 1 meV, which we ascribe to the valley orbit splitting. The total removal of valley degeneracy leaves only a 2-fold spin degeneracy, making edge quantum dots potentially promising candidates for silicon spin qubits.

3D spatial resolution improvement by dual-axis electron tomography: application to tri-gate transistors.

The performance of semiconductor devices can be linked to geometry and variations of the structure. For transistors in particular, the geometry of the gate stack is essential. In this work we investigate the gate stack of a tri-gate transistor using dual-axis electron tomography. This allows the reconstruction of all surfaces of the gate of the transistor with high resolution and measurement of the local thickness of the gate oxide. While previously, dual-axis electron tomography was employed for reducing missing wedge artifacts, our work demonstrates the potential of dual-axis tomography for improving the resolution of a tomographic reconstruction, even for structures not affected by missing wedge artifacts. By simulations and experiments we show the value of dual-axis tomography for characterization of nanoscale devices as an approach that requires no prior information and that can be easily extended even to more than two tilt axes.