Impedance-Readout Integrated Circuits for Electrical Impedance Spectroscopy: Methodological Review.

This review article provides a comprehensive overview of impedance-readout integrated circuits (ICs) for electrical impedance spectroscopy (EIS) applications. The readout IC, a crucial component of on-chip EIS systems, significantly affects key performance metrics of the entire system, such as frequency range, power consumption, accuracy, detection range, and throughput. With the growing demand for portable, wearable, and implantable EIS systems in the Internet-of-Things (IoT) era, achieving high energy efficiency while maintaining a wide frequency range, high accuracy, wide dynamic range, and high throughput has become a focus of research. Furthermore, to enhance the miniaturization and convenience of EIS systems, many emerging systems utilize two-electrode or dry electrode configurations instead of the conventional four-electrode configuration with wet electrodes for impedance measurement. In response to these trends, various technologies have been developed to ensure reliable operations even at two- or dry-electrode interfaces. This article reviews the principles, advantages, and disadvantages of techniques employed in state-of-the-art impedance-readout ICs, aiming to achieve high energy efficiency, wide frequency range, high accuracy, wide dynamic range, low noise, high throughput, and/or high input impedance. The thorough review of these advancements will provide valuable insights into the future development of impedance-readout ICs and systems for IoT and biomedical applications.

A 22-pJ/spike 73-Mspikes/s 130k-compartment neural array transceiver with conductance-based synaptic and membrane dynamics.

Neuromorphic cognitive computing offers a bio-inspired means to approach the natural intelligence of biological neural systems in silicon integrated circuits. Typically, such circuits either reproduce biophysical neuronal dynamics in great detail as tools for computational neuroscience, or abstract away the biology by simplifying the functional forms of neural computation in large-scale systems for machine intelligence with high integration density and energy efficiency. Here we report a hybrid which offers biophysical realism in the emulation of multi-compartmental neuronal network dynamics at very large scale with high implementation efficiency, and yet with high flexibility in configuring the functional form and the network topology. The integrate-and-fire array transceiver (IFAT) chip emulates the continuous-time analog membrane dynamics of 65 k two-compartment neurons with conductance-based synapses. Fired action potentials are registered as address-event encoded output spikes, while the four types of synapses coupling to each neuron are activated by address-event decoded input spikes for fully reconfigurable synaptic connectivity, facilitating virtual wiring as implemented by routing address-event spikes externally through synaptic routing table. Peak conductance strength of synapse activation specified by the address-event input spans three decades of dynamic range, digitally controlled by pulse width and amplitude modulation (PWAM) of the drive voltage activating the log-domain linear synapse circuit. Two nested levels of micro-pipelining in the IFAT architecture improve both throughput and efficiency of synaptic input. This two-tier micro-pipelining results in a measured sustained peak throughput of 73 Mspikes/s and overall chip-level energy efficiency of 22 pJ/spike. Non-uniformity in digitally encoded synapse strength due to analog mismatch is mitigated through single-point digital offset calibration. Combined with the flexibly layered and recurrent synaptic connectivity provided by hierarchical address-event routing of registered spike events through external memory, the IFAT lends itself to efficient large-scale emulation of general biophysical spiking neural networks, as well as rate-based mapping of rectified linear unit (ReLU) neural activations.

A Differential Rectifier With VTH Compensation for High-Frequency RF Inputs.

A CMOS differential-drive bootstrap (BS) rectifier achieving an efficient dynamic threshold voltage ( VTH)-drop compensation at high-frequency RF inputs is proposed for small biomedical implants with wireless power transmission. A bootstrapping circuit with a dynamically controlled NMOS transistor and two capacitors is proposed to implement a dynamic VTH-drop compensation (DVC). The proposed bootstrapping circuit dynamically compensates the VTH drop of the main rectifying transistors by generating a compensation voltage only when the compensation is required, improving the power conversion efficiency (PCE) of the proposed BS rectifier. The proposed BS rectifier is designed for an ISM-band frequency of 433.92 MHz. A prototype of the proposed rectifier is co-fabricated in a 0.18- µm standard CMOS process with another configuration of the rectifier and two conventional BS rectifiers for fair performance comparison at various conditions. According to the measurement results, the proposed BS rectifier achieves better DC output voltage level, voltage conversion ratio, and PCE than the conventional BS rectifiers. With 0-dBm input power, 433.92-MHz frequency, and 3-k Ω load resistor, the proposed BS rectifier achieves a peak PCE of 68.5%.

A Review on CNTs-Based Electrochemical Sensors and Biosensors: Unique Properties and Potential Applications.

Carbon nanotubes (CNTs), are safe, biocompatible, bioactive, and biodegradable materials, and have sparked a lot of attention due to their unique characteristics in a variety of applications, including medical and dye industries, paper manufacturing and water purification. CNTs also have a strong film-forming potential, permitting them to be widely employed in constructing sensors and biosensors. This review concentrates on the application of CNT-based nanocomposites in the production of electrochemical sensors and biosensors. It emphasizes the synthesis and optimization of CNT-based sensors for a range of applications and outlines the benefits of using CNTs for biomolecule immobilization. In addition, the use of molecularly imprinted polymer (MIP)-CNTs in the production of electrochemical sensors is also discussed. The challenges faced by the current CNTs-based sensors, along with some the future perspectives and their future opportunities, are also briefly explained in this paper.

RESEARCH HIGHLIGHTSReview article on advanced Carbon-Nanotube (CNT)-based sensors and biosensors.The advantages of using CNTs for biomolecule immobilization and in electrochemical sensors and biosensors are discussed.The use of molecularly imprinted polymer-CNT nanocomposites in the production of electrochemical sensors is also discussed.Several characteristics, including sensor manufacturing, linear ranges, detection limits, and repeatability, are described in depth.Challenges and prospects using CNTs modified sensors have been proposed.

A PVT-Robust AFE-Embedded Error-Feedback Noise-Shaping SAR ADC With Chopper-Based Passive High-Pass IIR Filtering for Direct Neural Recording.

This paper presents a PVT-robust error-feedback (EF) noise-shaping SAR (NS-SAR) ADC for direct neural-signal recording. For closed-loop bidirectional neural interfaces enabling the next generation neurological devices, a wide-dynamic-range neural recording circuit is required to accommodate stimulation artifacts. A recording structure using an NS-SAR ADC can be a good candidate because the high resolution and wide dynamic range can be obtained with a low oversampling ratio and power consumption. However, NS-SAR ADCs require an additional gain stage to obtain a well-shaped noise transfer function (NTF), and a dynamic amplifier is often used as the gain stage to minimize power overhead at the cost of vulnerability to PVT variations. To overcome this limitation, the proposed work reutilizes the capacitive-feedback amplifier, which is the analog front-end of the neural recording circuit, as a PVT-robust gain stage to achieve a reliable NS performance. In addition, a new chopper-based implementation of a passive high-pass IIR filter is proposed, achieving an improved NTF compared to prior EF NS-SAR ADCs. Fabricated in a 180-nm CMOS process, the proposed NS-SAR ADC consumes 4.3-µW power and achieves a signal-to-noise-and-distortion ratio (SNDR) of 71.7 dB and 82.7 dB for a bandwidth of 5 kHz and 300 Hz, resulting in a Schreier figure of merit (FOM) of 162.4 dB and 162.1 dB, respectively. Direct neural recording using the proposed NS-SAR ADC is demonstrated successfully in vivo, and also its tolerance against stimulation artifacts is validated in vitro.

An Intra-Body Power Transfer System With 1-mW Power Delivered to the Load and 3.3-V DC Output at 160-cm of on-Body Distance.

This paper presents an intra-body power transfer (IBPT) system that can deliver power greater than 1 mW across an on-body distance of 160 cm. A system simulation model is built for the characterization of the channel and optimization of the power transfer. Our system analysis and experimental validation demonstrate that 1 MHz is an optimal carrier frequency for IBPT in terms of power delivered to the load (PDL) and power efficiency (PE). Prototype TX and RX boards were built, and an IC was fabricated in a 180-nm CMOS process for the RX. The proposed RX IC consists of a voltage doubler (VD) and a charge pump (CP) to obtain a sufficiently high voltage conversion ratio (VCR). Among various rectifier topologies, the VD is the optimal topology for the power receiver front-end because the parasitic ground coupling capacitances, which inevitably exist in the IBPT system, act as an inherent input-coupling capacitance for the VD. The implemented VD utilizes a dynamic VTH compensation (DVC) for its diode components. Compared to the conventional static VTH compensation (SVC), DVC in the VD reduces the reverse leakage current of the diode, thus maximizing the power conversion efficiency (PCE) and VCR. In addition, the PDL is enhanced by inserting an inductor on the TX board. It reduces the backward-path impedance without increasing the RX volume, boosting the PDL by up to 9.9 times compared to the PDL without the inductor insertion. The proposed IBPT system delivers up to 178.8 µW of power at 11.7% of maximum power efficiency with 3.3-V DC output voltage and even 1.385 mW of power with the inductor insertion, supporting various biomedical wearable sensors, such as ECG sensor modules.

Wireless Kitchen Fire Prevention System Using Electrochemical Carbon Dioxide Gas Sensor for Smart Home.

This paper presents a wireless kitchen fire prevention system that can detect and notify the fire risk caused by gas stoves. The proposed system consists of two modules. The sensor module detects the concentration of carbon dioxide (CO2) near the gas stove and transmits the monitoring results wirelessly. The alarm module, which is placed in other places, receives the data and reminds the user of the stove status. The sensor module uses a cost-efficient electrochemical CO2 sensor and embeds an in situ algorithm that determines the status of the gas stove based on the measured CO2 concentration. For the wireless communication between the modules, on-off keying (OOK) is employed, thereby achieving a longer battery lifetime of the alarm module, low cost, and simple implementation. To increase the lifetime further, a wake-up function based on passive infrared (PIR) sensing is employed in the alarm module. Our system can successfully detect the on state of the stove within 40 s and the off state within 200 s. Thanks to the low-power implementation, in situ algorithm, and wake-up function, the alarm module's expected battery lifetime is extended to about two months.

On-Chip Sinusoidal Signal Generators for Electrical Impedance Spectroscopy: Methodological Review.

This paper reviews architectures and circuit implementations of on-chip sinusoidal signal generators (SSGs) for electrical impedance spectroscopy (EIS) applications. In recent years, there have been increasing interests in on-chip EIS systems, which measure a target material's impedance spectrum over a frequency range. The on-chip implementation allows EIS systems to have low power and small form factor, enabling various biomedical applications. One of the key building blocks of on-chip EIS systems is on-chip SSG, which determines the frequency range and the analysis precision of the whole EIS system. On-chip SSGs are generally required to have high linearity, wide frequency range, and high power and area efficiency. They are typically composed of three stages in general: waveform generation, linearity enhancement, and current injection. First, a sinusoidal waveform should be generated in SSGs. The generated waveform's frequency should be accurately adjustable over a wide range. The firstly generated waveform may not be perfectly linear, including unwanted harmonics. In the following linearity-enhancement step, these harmonics are attenuated by using filters typically. As the linearity of the waveform is improved, the precision of the EIS system gets ensured. Lastly, the filtered voltage waveform is now converted to a current by a current driver. Then, the current sinusoidal signal is injected into the target impedance. This review discusses the principles, advantages, and disadvantages of various techniques applied to each step in state-of-the-art on-chip SSGs. In addition, state-of-the-art designs are compared and summarized.

An Impedance Readout IC with Ratio-Based Measurement Techniques for Electrical Impedance Spectroscopy.

This paper presents an error-tolerant and power-efficient impedance measurement scheme for bioimpedance acquisition. The proposed architecture measures the magnitude and the real part of the target complex impedance, unlike other impedance measurement architectures measuring either the real/imaginary components or the magnitude and phase. The phase information of the target impedance is obtained by using the ratio between the magnitude and the real components. This can allow for avoiding direct phase measurements, which require fast, power-hungry circuit blocks. A reference resistor is connected in series with the target impedance to compensate for the errors caused by the delay in the sinusoidal signal generator and the amplifier at the front. Moreover, an additional magnitude measurement path is connected to the reference resistor to cancel out the nonlinearity of the proposed system and enhance the settling speed of the low-pass filter by a ratio-based detection. Thanks to this ratio-based detection, the accuracy is enhanced by 30%, and the settling time is improved by 87.7% compared to the conventional single-path detection. The proposed integrated circuit consumes only 513 µW for a wide frequency range of 10 Hz to 1 MHz, with the maximum magnitude and phase errors of 0.3% and 2.1°, respectively.

A Polar-Demodulation-Based Impedance-Measurement IC Using Frequency-Shift Technique With Low Power Consumption and Wide Frequency Range.

In this paper, we present a new impedance measurement integrated circuit (IC) for achieving a wideband coverage up to 10 MHz and low power consumption. A frequency-shift technique is applied to down-shift the input frequency, which ranges from 100 kHz to 10 MHz, into an intermediate frequency of 10 kHz, while the frequency-shifting is bypassed when the input frequency falls in the range from 100 Hz to 100 kHz. It results in 100 times relaxation of the requirement on the instrumentation amplifier (IA) bandwidth and the comparator delay, greatly reducing overall power consumption. The proposed IC employs the polar demodulation structure with a reference resistor that provides reference timing information avoiding any synchronization issue with the transmitter. In order to compensate for the comparator delay and nonlinearity of the IA, the reference magnitude measurement path is added, making only the mismatch of the circuit affects the accuracy. This allows for employing the auto-zeroing technique that can remove the offset but increase the absolute delay by using an additional capacitor to the comparator. The chip fabricated in a 0.18- µm CMOS technology consumes the power of 756 µW while covering the measurement frequency range from 100 Hz to 10 MHz and exhibiting the maximum magnitude and phase errors of 1.1 % and 1.9 °, respectively.

A Wireless Power and Data Transfer IC for Neural Prostheses Using a Single Inductive Link With Frequency-Splitting Characteristic.

This paper presents a frequency-splitting-based wireless power and data transfer IC that simultaneously delivers power and forward data over a single inductive link. For data transmission, frequency-shift keying (FSK) is utilized because the FSK modulation scheme supports continuous wireless power transmission without disruption of the carrier amplitude. Moreover, the link that manifests the frequency-splitting characteristic due to a close distance between coupled coils provides wide bandwidth for data delivery without degrading the quality factors of the coils. It results in large power delivery, high data rate, and high power transfer efficiency. The presented IC fabricated in a 180-nm BCD process simultaneously achieves up-to-115-mW wireless power delivery to the load and 2.5-Mb/s downlink data rate over the single inductive link. The measured overall power efficiency from the DC power supply at the transmitter module to the load at the receiver module reaches 56.7 % at its maximum, and the bit error rate is lower than 10 -6 at 2.5 Mb/s. As a result, the figure of merit (FoM) for data transmission is enhanced by 2 times, and the FoM for power delivery is improved by 38.7 times compared to prior state-of-the-arts using a single inductive link.

A Scalable Readout IC Based on Wideband Noise Cancelling for Full-Rate Scanning of High-Density Microelectrode Arrays.

This paper presents a highly scalable readout IC for high-density microelectrode arrays (MEAs). Although the recent development of large-scale high-density MEAs provides opportunities to achieve sub-cellular neural recording over a wide network area, it is challenging to implement the readout IC that can operate with such MEAs. The requirement of high-speed recording in large-scale arrays induces wideband-noise folding, which makes it challenging to achieve a good noise performance for high-fidelity neural recording. Moreover, for the wideband readout, the major noise contributor changes from the readout circuit to the cell-electrode interface. In this paper, we first show why the interface noise becomes the dominant noise source and elucidate its component that contributes the most: sealing resistance. Then, we propose a new readout circuit structure, which can effectively cancel the wideband interface noise. As a result, the signal-to-noise ratio of input neural spike signals is improved dramatically in all cell-attachment or sealing conditions. Particularly, it is shown that under weakly sealed conditions, the spikes can be detected only when the proposed wideband noise cancellation technique is applied.

A 3 mm × 3 mm Fully Integrated Wireless Power Receiver and Neural Interface System-on-Chip.

A miniaturized, fully integrated wireless power receiver system-on-chip with embedded 16-channel electrode array and data transceiver for electrocortical neural recording and stimulation is presented. An H-tree power and signal distribution network throughout the SoC maintains high quality factor up to 11 in the on-chip receiver coil at 144 MHz resonant frequency while rejecting RF interference in sensitive neural interface circuits owing to its perpendicular and equidistant geometry. A multi-mode buck-boost resonant regulating rectifier (B 2R 3) offers greater than 11-dB input dynamic range in RF reception and less than 1 mV overshoot in transient load regulation. At 10 mm link distance, the 9 mm 2 neural interface SoC fabricated in a 180 nm silicon-on-insulator (SOI) process attains an overall wireless power transmission system efficiency (WSE) of 3.4% in driving a 160  µW load yielding a WSE figure-of-merit of 131, while maintaining signal integrity in analog recording and wireless data transmission that comprise the on-chip load.

A Harmonic Error Cancellation Method for Accurate Clock-Based Electrochemical Impedance Spectroscopy.

Electrochemical impedance spectroscopy (EIS) is a widely used method to characterize the biological materials. In traditional methods for EIS, a sinusoidal current is used to excite the material under test and the measured voltage across that material is demodulated by a linear multiplication with quadrature sinusoidal signals. From the resulting demodulated output, the impedance (magnitude and phase) can be calculated. Although this sine-wave-based impedance measurement method can produce accurate impedance measurements, it requires bulky components and suffers from poor power efficiency due to sinusoidal waveform generation and linear multiplication. Alternatively, a method using square-wave signal, which is simply a clock, for both excitation and demodulation can be much more area and power efficient, but inherently suffers from substantial errors in the result due to significant harmonics in square waves. In this paper, we propose a technique to cancel out the errors caused by such harmonics of the square-wave-based excitation and demodulation. The proposed technique, based on the fact that the magnitude ratio of all the harmonics of a square wave are known, cancels out harmonic errors by subtracting or adding the square-wave-based measured results at higher harmonic frequencies as a simple post-processing calculation. Simulations on specific and also generic impedance models demonstrate the applicability of this technique to various impedance models. Experimental results using a discrete circuit model show that this technique can provide a precise measurement of the impedance with 1% magnitude error and 0.5° phase error considering just five terms. In addition, measurements with a biological tissue show an average magnitude and phase error of 0.7% and [Formula: see text], respectively, using the proposed error cancellation. Because this method replaces sinusoidal signal generation and linear multiplication with clock generation and simple switching, it has great potential to be integrated in a wearable and implantable health monitoring device at low area and power consumption.

A Fully Integrated RF-Powered Energy-Replenishing Current-Controlled Stimulator.

This paper presents a fully-integrated current-controlled stimulator that is powered directly from on-chip coil antenna and achieves adiabatic energy-replenishing operation without any bulky external components. Adiabatic supply voltages, which can reach a differential range of up to 7.2 V, are directly generated from an on-chip 190-MHz resonant LC tank via a self-cascading/folding rectifier network, bypassing the losses that would otherwise be introduced by the 0.8 V system supply-generating rectifier and regulator. The stimulator occupies 0.22 mm 2 in a 180 nm silicon-on-insulator process and produces differential currents up to 145  µA. Using a charge replenishing scheme, the stimulator redirects the charges accumulated across the electrodes to the system power supplies for 63.1% of stimulation energy recycling. To benchmark the efficiency of stimulation, a figure of merit termed the stimulator efficiency factor (SEF) is introduced. The adiabatic power rails and energy replenishment scheme enabled our stimulator to achieve an SEF of 6.0.

Magnetically Balanced Power and Data Telemetry for mm-scale Neural Implants.

Millimeter-sized implants for neural interface have been of great interest in the neuroengineering field due to their minimal invasiveness and great potential as an alternative to conventional bulky neural interfacing systems. However, their size poses great challenges not only on wireless power transmission, but also on uplink (implant to outside) data communication. One of most feasible data communication methods is load-shift keying based on the backscattering principle utilizing the existing inductive power link. This method consumes minimal power inherently, but its achievable modulation index is infinitesimal so that it is greatly challenging to detect the transmitted data on the outside. In this paper, we explore new schemes using a separate data reception coil that is magnetically balanced with the power coil. Due to its minimal crosstalk between the power transmission coil and data coil, a much higher data modulation index can be achieved. In addition to circular coils, we also present elliptical magnetic-balanced coil structures. According to finite element model stimulations with a realistic brain tissue model in Ansys HFSS and time domain simulation in Cadence, up to $ 15\times $ improvement in data modulation index can be achieved compared to conventional methods.

Harmonic Error Cancellation for Accurate Square-wave-based Bio-Impedance Measurements.

Bio-impedance spectroscopy, which measures impedance of the tissue over a frequency range, has been widely used to provide crucial information for monitoring human health. Its conventional methods using sine wave current stimulation of the tissue and sine wave demodulation of the resultant voltage provide an accurate impedance measurement, but involve bulky components and power inefficiency due to sinusoidal waveform generation and analog signal multiplication. Instead, the method using square wave clocks can be much more area and power efficient, but inherently has substantial errors in the measured result due to the presence of harmonics in square waves. In this paper we propose a technique to cancel the errors caused by harmonics of the square wave stimulation and demodulation. The technique, based on the fact that the magnitude ratio of all the harmonics of a square wave are known, cancels out harmonic errors by subtracting or adding the square-wave-based measured results at higher harmonics to the fundamental output as a simple post-processing calculation. Simulation results using a generic electrode and tissue model show that this technique can provide a precise measurement of the bio-impedance with <0.5% magnitude error and < 0.2 phase error considering just five frequency multiples. Because this method does not involve sinusoidal signal generation and analog mixing, it is adequate to be integrated in a wearable health monitoring device at low area and power overhead.

Towards high-resolution retinal prostheses with direct optical addressing and inductive telemetry.

OBJECTIVE: Despite considerable advances in retinal prostheses over the last two decades, the resolution of restored vision has remained severely limited, well below the 20/200 acuity threshold of blindness. Towards drastic improvements in spatial resolution, we present a scalable architecture for retinal prostheses in which each stimulation electrode is directly activated by incident light and powered by a common voltage pulse transferred over a single wireless inductive link. APPROACH: The hybrid optical addressability and electronic powering scheme provides separate spatial and temporal control over stimulation, and further provides optoelectronic gain for substantially lower light intensity thresholds than other optically addressed retinal prostheses using passive microphotodiode arrays. The architecture permits the use of high-density electrode arrays with ultra-high photosensitive silicon nanowires, obviating the need for excessive wiring and high-throughput data telemetry. Instead, the single inductive link drives the entire array of electrodes through two wires and provides external control over waveform parameters for common voltage stimulation. MAIN RESULTS: A complete system comprising inductive telemetry link, stimulation pulse demodulator, charge-balancing series capacitor, and nanowire-based electrode device is integrated and validated ex vivo on rat retina tissue. SIGNIFICANCE: Measurements demonstrate control over retinal neural activity both by light and electrical bias, validating the feasibility of the proposed architecture and its system components as an important first step towards a high-resolution optically addressed retinal prosthesis.

Integrated circuits and electrode interfaces for noninvasive physiological monitoring.

This paper presents an overview of the fundamentals and state of the-art in noninvasive physiological monitoring instrumentation with a focus on electrode and optrode interfaces to the body, and micropower-integrated circuit design for unobtrusive wearable applications. Since the electrode/optrode-body interface is a performance limiting factor in noninvasive monitoring systems, practical interface configurations are offered for biopotential acquisition, electrode-tissue impedance measurement, and optical biosignal sensing. A systematic approach to instrumentation amplifier (IA) design using CMOS transistors operating in weak inversion is shown to offer high energy and noise efficiency. Practical methodologies to obviate 1/f noise, counteract electrode offset drift, improve common-mode rejection ratio, and obtain subhertz high-pass cutoff are illustrated with a survey of the state-of-the-art IAs. Furthermore, fundamental principles and state-of-the-art technologies for electrode-tissue impedance measurement, photoplethysmography, functional near-infrared spectroscopy, and signal coding and quantization are reviewed, with additional guidelines for overall power management including wireless transmission. Examples are presented of practical dry-contact and noncontact cardiac, respiratory, muscle and brain monitoring systems, and their clinical applications.

Direct inductive stimulation for energy-efficient wireless neural interfaces.

Advanced neural stimulator designs consume power and produce unwanted thermal effects that risk damage to surrounding tissue. In this work, we present a simplified architecture for wireless neural stimulators that relies on a few circuit components including an inductor, capacitor and a diode to elicit an action potential in neurons. The feasibility of the design is supported with analytical models of the inductive link, electrode, electrolyte, membrane and channels of neurons. Finally, a flexible implantable prototype of the design is fabricated and tested in vitro on neural tissue.