Disorder-Induced Magnetotransport Anomalies in Amorphous and Textured Co1-xSix Semimetal Thin Films.

In recent times the chiral semimetal cobalt monosilicide (CoSi) has emerged as a prototypical, nearly ideal topological conductor hosting giant, topologically protected Fermi arcs. Exotic topological quantum properties have already been identified in CoSi bulk single crystals. However, CoSi is also known for being prone to intrinsic disorder and inhomogeneities, which, despite topological protection, risk jeopardizing its topological transport features. Alternatively, topology may be stabilized by disorder, suggesting the tantalizing possibility of an amorphous variant of a topological metal, yet to be discovered. In this respect, understanding how microstructure and stoichiometry affect magnetotransport properties is of pivotal importance, particularly in case of low-dimensional CoSi thin films and devices. Here we comprehensively investigate the magnetotransport and magnetic properties of ≈25 nm Co1-xSix thin films grown on a MgO substrate with controlled film microstructure (amorphous vs textured) and chemical composition (0.40 < x < 0.60). The resistivity of Co1-xSix thin films is nearly insensitive to the film microstructure and displays a progressive evolution from metallic-like (dρxx/dT > 0) to semiconducting-like (dρxx/dT < 0) regimes of conduction upon increasing the silicon content. A variety of anomalies in the magnetotransport properties, comprising for instance signatures consistent with quantum localization and electron-electron interactions, anomalous Hall and Kondo effects, and the occurrence of magnetic exchange interactions, are attributable to the prominent influence of intrinsic structural and chemical disorder. Our systematic survey brings to attention the complexity and the challenges involved in the prospective exploitation of the topological chiral semimetal CoSi in nanoscale thin films and devices.

Electrodeposition as an Alternative Approach for Monolithic Integration of InSb on Silicon.

High-performance electronics would greatly benefit from a versatile III-V integration process on silicon. Unfortunately, integration using hetero epitaxy is hampered by polarity, lattice, and thermal expansion mismatch. This work proposes an alternative concept of III-V integration combining advantages of pulse electrodeposition, template-assisted selective epitaxy, and recrystallization from a melt. Efficient electrodeposition of nano-crystalline and stochiometric InSb in planar templates on Si (001) is achieved. The InSb deposits are analysed by high resolution scanning transmission electron microscopy (HR-STEM) and energy-dispersive X-ray spectroscopy (EDX) before and after melting and recrystallization. The results show that InSb can crystallise epitaxially on Si with the formation of stacking faults. Furthermore, X-ray photoelectron (XPS) and Auger electron (AE) spectroscopy analysis indicate that the InSb crystal size is limited by the impurity concentration resulting from the electrodeposition process.

Dust-Sized High-Power-Density Photovoltaic Cells on Si and SOI Substrates for Wafer-Level-Packaged Small Edge Computers.

Advancement in microelectronics technology enables autonomous edge computing platforms in the size of a dust mote (<1 mm), bringing efficient and low-cost artificial intelligence close to the end user and Internet-of-Things (IoT) applications. The key challenge for these compact high-performance edge computers is the integration of a power source that satisfies the high-power-density requirement and does not increase the complexity and cost of the packaging. Here, it is shown that dust-sized III-V photovoltaic (PV) cells grown on Si and silicon-on-insulator (SOI) substrates can be integrated using a wafer-level-packaging process and achieve higher power density than all prior micro-PVs on Si and SOI substrates. The high-throughput heterogeneous integration unlocks the potential of large-scale manufacturing of these integrated systems with low cost for IoT applications. The negative effect of crystallographic defects in the heteroepitaxial materials on PV performance diminishes at high power density. Simultaneous power delivery and data transmission to the dust mote with heteroepitaxially grown PV are also demonstrated using hand-held illumination sources.

Diffusion-Controlled Porous Crystalline Silicon Lithium Metal Batteries.

Nanostructured porous silicon materials have recently advanced as hosts for Li-metal plating. However, limitations involve detrimental silicon self-pulverization, Li-dendrites, and the ability to achieve wafer-level integration of non-composite, pure silicon anodes. compo. Herein, full cells featuring low-resistance, wafer-scale porous crystalline silicon (PCS) anodes are embedded with a nanoporous Li-plating and diffusion-regulating surface layer upon combined wafer surface cleaning (SC) and anodization. LL Lithiophilic surface formation is illustrated via correlation of surface groups and X-ray structure. Low-cost SC-PCS anodes require no composite formulation, and pre-lithiation enables sustainable Li-metal plating/stripping on the lithiophilic surface and in SC-PCS bulk nanostructure. Anodization time and C-rate determined competitive full cell performance: NMC811 | 4800 s SC-PCS: 195 mAh/g (99.9% coulombic efficiency [C.E.], C/3, 50 cycles), 165 mAh/g, 587 Wh/kg (97.1% C.E., C/3 and C/2 rate, 350 cycles), 24 Ω∗cm2 SC-PCS-resistivity (900 cycles); 160 µm LCO | 500 s SC-PCS: 102 mAh/g (94.1% C.E., 1C, 350 cycles).

High efficiency Cu2ZnSn(S,Se)4 solar cells by applying a double In2S3/CdS emitter.

High-efficiency Cu2ZnSn(S,Se)4 solar cells are reported by applying In2S3/CdS double emitters. This new structure offers a high doping concentration within the Cu2ZnSn(S,Se)4 solar cells, resulting in a substantial enhancement in open-circuit voltage. The 12.4% device is obtained with a record open-circuit voltage deficit of 593 mV.