High-Performance Two-Dimensional Electronics with a Noncontact Remote Doping Method.

Because of the intrinsic low carrier density of monolayer two-dimensional (2D) materials, doping is crucial for the performance of underlap top-gated 2D devices. However, wet etching of a high-k (dielectric constant) dielectric layer is difficult to implement without causing performance deterioration on the devices; therefore, finding a suitable spacer doping technique for 2D devices is indispensable. In this study, we developed a remote doping (RD) method in which defective SiOx can remotely dope the underlying high-k capped 2D regions without directly contacting these materials. This method achieved a doping density as high as 1.4 × 1013 cm-2 without reducing the mobility of the doped materials; after 1 month, the doping concentration remained as high as 1.2 × 1013 cm-2. Defective SiOx can be used to dope most popular 2D transition-metal dichalcogenides. The low-k properties of SiOx render it ideal for spacer doping, which is very attractive from the perspective of circuit operation. In our experiments, MoS2 and WS2 underlap top-gate devices exhibited 10× and 200× increases in their on-currents, respectively, after being doped with SiOx. These results indicate that SiOx doping can be conducted to manufacture high-performance 2D devices.

Statistical Assessment of High-Performance Scaled Double-Gate Transistors from Monolayer WS2.

Scaling of monolayer transition metal dichalcogenide (TMD) field-effect transistors (FETs) is an important step toward evaluating the application space of TMD materials. Although some work on ultrashort channel monolayer (ML) TMD FETs has been published, there exist no comprehensive studies that assess their performance in a statistically relevant manner, providing critical insights into the impact of the device geometry. Part of the reason for the absence of such a study is the substantial variability of TMD devices when processes are not carefully controlled. In this work, we show a statistical study of ultrashort channel double-gated ML WS2 FETs exhibiting excellent device performance and limited device-to-device variations. From a detailed analysis of cross-sectional scanning transmission electron microscopy (STEM) images and careful technology computer aided design (TCAD) simulations, we evaluated, in particular, an unexpected deterioration of the subthreshold characteristics for our shortest devices. Two potential candidates for the observed behavior were identified, i.e., buckling of the TMD on the substrate and loss of gate control due to the source geometry and the high-k dielectric between the metal gate and the metal source electrode.

Mobility Extraction in 2D Transition Metal Dichalcogenide Devices-Avoiding Contact Resistance Implicated Overestimation.

Schottky barrier (SB) transistors operate distinctly different from conventional metal-oxide semiconductor field-effect transistors, in a unique way that the gate impacts the carrier injection from the metal source/drain contacts into the channel region. While it has been long recognized that this can have severe implications for device characteristics in the subthreshold region, impacts of contact gating of SB in the on-state of the devices, which affects evaluation of intrinsic channel properties, have been yet comprehensively studied. Due to the fact that contact resistance (RC ) is always gate-dependent in a typical back-gated device structure, the traditional approach of deriving field-effect mobility from the maximum transconductance (gm ) is in principle not correct and can even overestimate the mobility. In addition, an exhibition of two different threshold voltages for the channel and the contact region leads to another layer of complexity in determining the true carrier concentration calculated from Q = COX * (VG -VTH ). Through a detailed experimental analysis, the effect of different effective oxide thicknesses, distinct SB heights, and doping-induced reductions in the SB width are carefully evaluated to gain a better understanding of their impact on important device metrics.

Direct observation of valley-coupled topological current in MoS2.

The valley degree of freedom of electrons in two-dimensional transition metal dichalcogenides has been extensively studied by theory (1-4), optical (5-9), and optoelectronic (10-13) experiments. However, generation and detection of pure valley current without relying on optical selection have not yet been demonstrated in these materials. Here, we report that valley current can be electrically induced and detected through the valley Hall effect and inverse valley Hall effect, respectively, in monolayer molybdenum disulfide. We compare temperature and channel length dependence of nonlocal electrical signals in monolayer and multilayer samples to distinguish the valley Hall effect from classical ohmic contributions. Notably, valley transport is observed over a distance of 4 µm in monolayer samples at room temperature. Our findings will enable a new generation of electronic devices using the valley degree of freedom, which can be used for future novel valleytronic applications.