A self-adaptive hardware with resistive switching synapses for experience-based neurocomputing.

Neurobiological systems continually interact with the surrounding environment to refine their behaviour toward the best possible reward. Achieving such learning by experience is one of the main challenges of artificial intelligence, but currently it is hindered by the lack of hardware capable of plastic adaptation. Here, we propose a bio-inspired recurrent neural network, mastered by a digital system on chip with resistive-switching synaptic arrays of memory devices, which exploits homeostatic Hebbian learning for improved efficiency. All the results are discussed experimentally and theoretically, proposing a conceptual framework for benchmarking the main outcomes in terms of accuracy and resilience. To test the proposed architecture for reinforcement learning tasks, we study the autonomous exploration of continually evolving environments and verify the results for the Mars rover navigation. We also show that, compared to conventional deep learning techniques, our in-memory hardware has the potential to achieve a significant boost in speed and power-saving.

Computing of temporal information in spiking neural networks with ReRAM synapses.

Resistive switching random-access memory (ReRAM) is a two-terminal device based on ion migration to induce resistance switching between a high resistance state (HRS) and a low resistance state (LRS). ReRAM is considered one of the most promising technologies for artificial synapses in brain-inspired neuromorphic computing systems. However, there is still a lack of general understanding about how to develop such a gestalt system to imitate and compete with the brain's functionality and efficiency. Spiking neural networks (SNNs) are well suited to describe the complex spatiotemporal processing inside the brain, where the energy efficiency of computation mostly relies on the spike carrying information about both space (which neuron fires) and time (when a neuron fires). This work addresses the methodology and implementation of a neuromorphic SNN system to compute the temporal information among neural spikes using ReRAM synapses capable of spike-timing dependent plasticity (STDP). The learning and recognition of spatiotemporal spike sequences are experimentally demonstrated. Our simulation study shows that it is possible to construct a multi-layer spatiotemporal computing network. Spatiotemporal computing also enables learning and detection of the trace of moving objects and mimicking of the hierarchy structure of the biological visual cortex adopting temporal-coding for fast recognition.

Publisher Correction: Memristive neural network for on-line learning and tracking with brain-inspired spike timing dependent plasticity.

A correction to this article has been published and is linked from the HTML and PDF versions of this paper. The error has been fixed in the paper.

Memristive neural network for on-line learning and tracking with brain-inspired spike timing dependent plasticity.

Brain-inspired computation can revolutionize information technology by introducing machines capable of recognizing patterns (images, speech, video) and interacting with the external world in a cognitive, humanlike way. Achieving this goal requires first to gain a detailed understanding of the brain operation, and second to identify a scalable microelectronic technology capable of reproducing some of the inherent functions of the human brain, such as the high synaptic connectivity (~104) and the peculiar time-dependent synaptic plasticity. Here we demonstrate unsupervised learning and tracking in a spiking neural network with memristive synapses, where synaptic weights are updated via brain-inspired spike timing dependent plasticity (STDP). The synaptic conductance is updated by the local time-dependent superposition of pre- and post-synaptic spikes within a hybrid one-transistor/one-resistor (1T1R) memristive synapse. Only 2 synaptic states, namely the low resistance state (LRS) and the high resistance state (HRS), are sufficient to learn and recognize patterns. Unsupervised learning of a static pattern and tracking of a dynamic pattern of up to 4 × 4 pixels are demonstrated, paving the way for intelligent hardware technology with up-scaled memristive neural networks.

Physics-based modeling approaches of resistive switching devices for memory and in-memory computing applications.

The semiconductor industry is currently challenged by the emergence of Internet of Things, Big data, and deep-learning techniques to enable object recognition and inference in portable computers. These revolutions demand new technologies for memory and computation going beyond the standard CMOS-based platform. In this scenario, resistive switching memory (RRAM) is extremely promising in the frame of storage technology, memory devices, and in-memory computing circuits, such as memristive logic or neuromorphic machines. To serve as enabling technology for these new fields, however, there is still a lack of industrial tools to predict the device behavior under certain operation schemes and to allow for optimization of the device properties based on materials and stack engineering. This work provides an overview of modeling approaches for RRAM simulation, at the level of technology computer aided design and high-level compact models for circuit simulations. Finite element method modeling, kinetic Monte Carlo models, and physics-based analytical models will be reviewed. The adaptation of modeling schemes to various RRAM concepts, such as filamentary switching and interface switching, will be discussed. Finally, application cases of compact modeling to simulate simple RRAM circuits for computing will be shown.

Bipolar switching in chalcogenide phase change memory.

Phase change materials based on chalcogenides are key enabling technologies for optical storage, such as rewritable CD and DVD, and recently also electrical nonvolatile memory, named phase change memory (PCM). In a PCM, the amorphous or crystalline phase affects the material band structure, hence the device resistance. Although phase transformation is extremely fast and repeatable, the amorphous phase suffers structural relaxation and crystallization at relatively low temperatures, which may affect the temperature stability of PCM state. To improve the time/temperature stability of the PCM, novel operation modes of the device should be identified. Here, we present bipolar switching operation of PCM, which is interpreted by ion migration in the solid state induced by elevated temperature and electric field similar to the bipolar switching in metal oxides. The temperature stability of the high resistance state is demonstrated and explained based on the local depletion of chemical species from the electrode region.

Spike-timing dependent plasticity in a transistor-selected resistive switching memory.

In a neural network, neuron computation is achieved through the summation of input signals fed by synaptic connections. The synaptic activity (weight) is dictated by the synchronous firing of neurons, inducing potentiation/depression of the synaptic connection. This learning function can be supported by the resistive switching memory (RRAM), which changes its resistance depending on the amplitude, the pulse width and the bias polarity of the applied signal. This work shows a new synapse circuit comprising a MOS transistor as a selector and a RRAM as a variable resistance, displaying spike-timing dependent plasticity (STDP) similar to the one originally experienced in biological neural networks. We demonstrate long-term potentiation and long-term depression by simulations with an analytical model of resistive switching. Finally, the experimental demonstration of the new STDP scheme is presented.

Logic computation in phase change materials by threshold and memory switching.

Memristors, namely hysteretic devices capable of changing their resistance in response to applied electrical stimuli, may provide new opportunities for future memory and computation, thanks to their scalable size, low switching energy and nonvolatile nature. We have developed a functionally complete set of logic functions including NOR, NAND and NOT gates, each utilizing a single phase-change memristor (PCM) where resistance switching is due to the phase transformation of an active chalcogenide material. The logic operations are enabled by the high functionality of nanoscale phase change, featuring voltage comparison, additive crystallization and pulse-induced amorphization. The nonvolatile nature of memristive states provides the basis for developing reconfigurable hybrid logic/memory circuits featuring low-power and high-speed switching.

Multiple memory states in resistive switching devices through controlled size and orientation of the conductive filament.

Multilevel operation in resistive switching memory (RRAM) based on HfOx is demonstrated through variable sizes and orientations of the conductive filament. Memory states with the same resistance, but opposite orientation of defects, display a different response to an applied read voltage, therefore allowing an improvement of the information stored in each physical cell. The multilevel scheme allows a 50% increase (from 2 to 3 bits) of the stored information.

Physical models of size-dependent nanofilament formation and rupture in NiO resistive switching memories.

NiO films display unipolar resistance switching characteristics, due to the electrically induced formation and rupture of nanofilaments. While the applicative interest for possible use in highly dense resistance switching memory (RRAM) is extremely high, switching phenomena pose strong fundamental challenges in understanding the physical mechanisms and models. This work addresses the set and reset mechanisms for the formation and rupture of nanofilaments in NiO RRAM devices. Reset is described in terms of thermally-accelerated diffusion and oxidation processes, and its resistance dependence is explained by size-dependent Joule heating and oxidation. The filament is described as a region with locally-enhanced doping, resulting in an insulator-metal transition driven by structural and chemical defects. The set mechanism is explained by a threshold switching effect, triggering chemical reduction and a consequent local increase of metallic doping. The possible use of the observed resistance-dependent reset and set parameters to improve the memory array operation and variability is finally discussed.